A Review of Engineering Techniques for CMOS On-Chip Inductor Design and Quality Factor Enhancement From MHz-to-GHz Frequency Domains

A Review of Engineering Techniques for CMOS On-Chip Inductor Design and Quality Factor Enhancement From MHz-to-GHz Frequency Domains

This paper presents a comprehensive review of engineering techniques employed to enhance the quality factor (Q-factor) of silicon-based on-chip inductors across MHz-to-GHz frequency domains. The performance of CMOS on-chip inductors is often bottlenecked by the substrate losses, parasitic effects an...

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Bibliographic Details
Main Authors: Selvakumar Mariappan, Jagadheswaran Rajendran, Norhamizah Idros, Asrulnizam Abd Manaf, Narendra Kumar, Abdullah Alghaihab, Arokia Nathan, Binboga Siddik Yarman
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
CMOS
silicon
inductor
Q-factor
efficiency
on-chip
Online Access:https://ieeexplore.ieee.org/document/11115057/
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https://ieeexplore.ieee.org/document/11115057/

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