A Heuristic Scheduler for Port-Constrained Floating-Point Pipelines
We describe a heuristic scheduling approach for optimizing floating-point pipelines subject to input port constraints. The objective of our technique is to maximize functional unit reuse while minimizing the following performance metrics in the generated circuit: (1) maximum multiplexer fanin, (2)...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2013-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2013/849545 |
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