HRaccoon: A High-performance Configurable SCA Resilient Raccoon Hardware Accelerator
The lattice-based Raccoon scheme is one of the candidates in Round 1 of the National Institute of Standards and Technology (NIST) post-quantum cryptography (PQC) additional digital signatures standardization process. As a scheme with built-in masking features, Raccoon is also a viable candidate for...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Ruhr-Universität Bochum
2025-06-01
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| Series: | Transactions on Cryptographic Hardware and Embedded Systems |
| Subjects: | |
| Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/12222 |
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