Hardware Architecture for Real-Time Computation of Image Component Feature Descriptors on a FPGA
This paper describes a hardware architecture for real-time image component labeling and the computation of image component feature descriptors. These descriptors are object related properties used to describe each image component. Embedded machine vision systems demand a robust performance and power...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2014-01-01
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| Series: | International Journal of Distributed Sensor Networks |
| Online Access: | https://doi.org/10.1155/2014/815378 |
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