An Efficient CMOS RF-DC Rectifier Based on a Dual Dynamic Self-Biasing Approach
This paper presents an efficient CMOS rectifier with dual dynamic gate/body self-biasing network design to improve power conversion efficiency (PCE) and sensitivity. The proposed rectifier is designed using a 180 nm CMOS process and occupies a silicon area of <inline-formula> <tex-math nota...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/11005478/ |
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