Electrically Erasable Optical I/O for Wafer Scale Testing of Silicon Photonic Integrated Circuits

Electrically Erasable Optical I/O for Wafer Scale Testing of Silicon Photonic Integrated Circuits

A technique for realizing electrically erasable photonics devices using micro-heaters for localized annealing of lattice defects in silicon is presented. The lattice defects have previously been introduced by ion implantation in order to cause a refractive index change. This technique can be used to...

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Bibliographic Details
Main Authors: Xingshi Yu, Xia Chen, Milan M. Milosevic, Xingzhao Yan, Shinichi Saito, Graham T. Reed
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Photonics Journal
Subjects:
Ion-implantation
Electrically erasable
Directional couplers
Mach-Zehnder Interferometer
Wafer scale testing
Online Access:https://ieeexplore.ieee.org/document/9210769/
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https://ieeexplore.ieee.org/document/9210769/

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