APA (7th ed.) Citation

Kwon, T. S., Yoon, Y. J., Park, D. Y., Bae, J., Song, Y. S., Kim, H. W., . . . Woo, S. Y. Structurally optimized SiC CMOS FinFET for high-temperature and low-power SoC logic integration. Nature Portfolio.

Chicago Style (17th ed.) Citation

Kwon, Tae Seong, Young Jun Yoon, Do Yeon Park, Jong-Ho Bae, Young Suh Song, Hyoung Woo Kim, Jae Hwa Seo, and Sung Yun Woo. Structurally Optimized SiC CMOS FinFET for High-temperature and Low-power SoC Logic Integration. Nature Portfolio.

MLA (9th ed.) Citation

Kwon, Tae Seong, et al. Structurally Optimized SiC CMOS FinFET for High-temperature and Low-power SoC Logic Integration. Nature Portfolio.