Structurally optimized SiC CMOS FinFET for high-temperature and low-power SoC logic integration

Structurally optimized SiC CMOS FinFET for high-temperature and low-power SoC logic integration

Abstract A high-temperature-operable binary inverter was designed through structural optimization of SiC-based CMOS FinFETs using 3D TCAD simulations. A FinFET architecture was incorporated into SiC CMOS with an optimized fin structure to overcome the critical challenges of high subthreshold swing (...

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Bibliographic Details
Main Authors: Tae Seong Kwon, Young Jun Yoon, Do Yeon Park, Jong-Ho Bae, Young Suh Song, Hyoung Woo Kim, Jae Hwa Seo, Sung Yun Woo
Format: Article
Language:English
Published: Nature Portfolio 2025-08-01
Series:Scientific Reports
Subjects:
Silicon-carbide (SiC)
CMOS
FinFET
High-temperature application
Self-heating
Binary inverter
Online Access:https://doi.org/10.1038/s41598-025-14081-1
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https://doi.org/10.1038/s41598-025-14081-1

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