Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip

The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop syste...

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Main Authors: William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French
Format: Article
Language:English
Published: Wiley 2012-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2012/872610
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author William V. Kritikos
Andrew G. Schmidt
Ron Sass
Erik K. Anderson
Matthew French
author_facet William V. Kritikos
Andrew G. Schmidt
Ron Sass
Erik K. Anderson
Matthew French
author_sort William V. Kritikos
collection DOAJ
description The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to support high-performance systems with numerous hardware kernels. This paper documents the API, describes the common infrastructure, and quantifies the performance of a complete implementation. Furthermore, the overhead, in terms of resource utilization, is reported along with the ability to integrate hard and soft processor cores with purely hardware kernels being demonstrated.
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institution Kabale University
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publishDate 2012-01-01
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series International Journal of Reconfigurable Computing
spelling doaj-art-a6b06e328c8440eca4c1c4c3bf42477d2025-02-03T06:00:28ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092012-01-01201210.1155/2012/872610872610Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable ChipWilliam V. Kritikos0Andrew G. Schmidt1Ron Sass2Erik K. Anderson3Matthew French4Reconfigurable Computing Systems Laboartory, ECE Deptartment, UNC Charlotte, 9201 University City Boulevad, Charlotte, NC 28223, USAReconfigurable Computing Systems Laboartory, ECE Deptartment, UNC Charlotte, 9201 University City Boulevad, Charlotte, NC 28223, USAReconfigurable Computing Systems Laboartory, ECE Deptartment, UNC Charlotte, 9201 University City Boulevad, Charlotte, NC 28223, USAInformation Sciences Institute, University of Southern California, 3811 North Fairfax Drive, Suite 200, Arlington, VA 22203, USAInformation Sciences Institute, University of Southern California, 3811 North Fairfax Drive, Suite 200, Arlington, VA 22203, USAThe reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to support high-performance systems with numerous hardware kernels. This paper documents the API, describes the common infrastructure, and quantifies the performance of a complete implementation. Furthermore, the overhead, in terms of resource utilization, is reported along with the ability to integrate hard and soft processor cores with purely hardware kernels being demonstrated.http://dx.doi.org/10.1155/2012/872610
spellingShingle William V. Kritikos
Andrew G. Schmidt
Ron Sass
Erik K. Anderson
Matthew French
Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
International Journal of Reconfigurable Computing
title Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
title_full Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
title_fullStr Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
title_full_unstemmed Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
title_short Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
title_sort redsharc a programming model and on chip network for multi core systems on a programmable chip
url http://dx.doi.org/10.1155/2012/872610
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