ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES

The effect of non-flatness of semiconductor wafers on characteristics of manufactured devices is shown through defocusing of an image of a topological layout of a structure being formed and through reduction of resolution at photolithographic processing. For quality control of non-flatness the Makyo...

Full description

Saved in:
Bibliographic Details
Main Authors: S. F. Sianko, V. A. Zelenin
Format: Article
Language:English
Published: Belarusian National Technical University 2018-03-01
Series:Приборы и методы измерений
Subjects:
Online Access:https://pimi.bntu.by/jour/article/view/370
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1832543788168380416
author S. F. Sianko
V. A. Zelenin
author_facet S. F. Sianko
V. A. Zelenin
author_sort S. F. Sianko
collection DOAJ
description The effect of non-flatness of semiconductor wafers on characteristics of manufactured devices is shown through defocusing of an image of a topological layout of a structure being formed and through reduction of resolution at photolithographic processing. For quality control of non-flatness the Makyoh method is widely used. However, it does not allow obtaining quantitative characteristics of observed defects, which essentially restricts its application. The objective of this work has been developing of a calculation method for dimensions of topographic defects of wafers having semiconductor structures formed on them, which has allowed determining acceptability criteria for wafers, depending on defects dimensions and conducting their timely penalization.A calculation method under development is based on deduction of relationships linking distortion of image elements to curvature of local sections of a semiconductor wafer that has formed structures. These structures have been considered to be image finite elements and within this range the curvature radius has been assumed to be constant. Sequential calculation of deviation of element ends from ideal plane based on determining their curvature radius has allowed obtaining geometry of a target surface in a set range of elements. Conditions of image formation and requirements to structures have been determined.Analytical expressions relating a deviation value of elements of a light-to-dark image with surface geometry have been obtained. This allows conducting effective quantitative control of observed topographic defects both under production and research conditions. Examples of calculation of topographic defects of semiconductor silicon wafers have been provided. Comparison of the obtained results with the data obtained by conventional methods has shown their complete conformity.
format Article
id doaj-art-9acd6864064747e994695a76fc5069e5
institution Kabale University
issn 2220-9506
2414-0473
language English
publishDate 2018-03-01
publisher Belarusian National Technical University
record_format Article
series Приборы и методы измерений
spelling doaj-art-9acd6864064747e994695a76fc5069e52025-02-03T11:28:26ZengBelarusian National Technical UniversityПриборы и методы измерений2220-95062414-04732018-03-0191748410.21122/2220-9506-2018-9-1-74-84308ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURESS. F. Sianko0V. A. Zelenin1Physical-Engineering Institute of the NAS of BelarusPhysical-Engineering Institute of the NAS of BelarusThe effect of non-flatness of semiconductor wafers on characteristics of manufactured devices is shown through defocusing of an image of a topological layout of a structure being formed and through reduction of resolution at photolithographic processing. For quality control of non-flatness the Makyoh method is widely used. However, it does not allow obtaining quantitative characteristics of observed defects, which essentially restricts its application. The objective of this work has been developing of a calculation method for dimensions of topographic defects of wafers having semiconductor structures formed on them, which has allowed determining acceptability criteria for wafers, depending on defects dimensions and conducting their timely penalization.A calculation method under development is based on deduction of relationships linking distortion of image elements to curvature of local sections of a semiconductor wafer that has formed structures. These structures have been considered to be image finite elements and within this range the curvature radius has been assumed to be constant. Sequential calculation of deviation of element ends from ideal plane based on determining their curvature radius has allowed obtaining geometry of a target surface in a set range of elements. Conditions of image formation and requirements to structures have been determined.Analytical expressions relating a deviation value of elements of a light-to-dark image with surface geometry have been obtained. This allows conducting effective quantitative control of observed topographic defects both under production and research conditions. Examples of calculation of topographic defects of semiconductor silicon wafers have been provided. Comparison of the obtained results with the data obtained by conventional methods has shown their complete conformity.https://pimi.bntu.by/jour/article/view/370semiconductor structuresmakyoh topographyquantitative characterizationimage calculation
spellingShingle S. F. Sianko
V. A. Zelenin
ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
Приборы и методы измерений
semiconductor structures
makyoh topography
quantitative characterization
image calculation
title ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
title_full ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
title_fullStr ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
title_full_unstemmed ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
title_short ESTIMATION OF TOPOGRAPHIC DEFECTS DIMENSIONS OF SEMICONDUCTOR SILICON STRUCTURES
title_sort estimation of topographic defects dimensions of semiconductor silicon structures
topic semiconductor structures
makyoh topography
quantitative characterization
image calculation
url https://pimi.bntu.by/jour/article/view/370
work_keys_str_mv AT sfsianko estimationoftopographicdefectsdimensionsofsemiconductorsiliconstructures
AT vazelenin estimationoftopographicdefectsdimensionsofsemiconductorsiliconstructures