APA (7th ed.) Citation

Ling, M., Shang, X., Shen, S., Shao, T., & Yang, J. Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM. IEEE.

Chicago Style (17th ed.) Citation

Ling, Ming, Xiaojing Shang, Shan Shen, Tianxiang Shao, and Jun Yang. Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM. IEEE.

MLA (9th ed.) Citation

Ling, Ming, et al. Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM. IEEE.