A 1.8-V 95.8-dB SNDR Incremental Delta-Sigma ADC With Analog Noise Reduction Techniques for Sensor ROIC

A 1.8-V 95.8-dB SNDR Incremental Delta-Sigma ADC With Analog Noise Reduction Techniques for Sensor ROIC

A delta-sigma modulator (DSM)-based incremental analog-to-digital converter (ADC) is proposed for use in the readout integrated circuit of low-power high-resolution sensors. The proposed incremental delta-sigma ADC (IADC) consists of a second-order cascaded-of-integrators feedforward (CIFF) DSM with...

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Bibliographic Details
Main Authors: Juncheol Kim, Young-Chan Jang
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Delta-sigma modulator
incremental analog-to-analog converter
successive approximation register
flicker noise
thermal noise
band-gap reference
Online Access:https://ieeexplore.ieee.org/document/11053869/
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https://ieeexplore.ieee.org/document/11053869/

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