Fast Digital Circuit Synthesis Framework Based on Deep Reinforcement Learning Using Scoreboard

Fast Digital Circuit Synthesis Framework Based on Deep Reinforcement Learning Using Scoreboard

In a field of circuit design that uses deep learning such as layout optimization, parameter optimization, and circuit synthesis automation, the proposed framework, fast-GateRL, addresses the digital circuit synthesis automation based on deep reinforcement learning at a CMOS transistor level. The fas...

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Bibliographic Details
Main Authors: Hyeonseong Cho, Yeonhak Pyo, Tae Woong Lee, Jiyoung Lee, Hyunyoung Choi, Hyung Uk Cho, Hyoungsik Nam
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Digital circuit synthesis
initial state selection
intermediate reward
shoot-through current path
reinforcement learning
threshold voltage
Online Access:https://ieeexplore.ieee.org/document/10945333/
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