Enhanced Ferroelectricity of Hf‐Based Memcapacitors by Adopting Ti Insert‐Layer and C–V Measurement for Constructing Energy‐Efficient Reservoir Computing Network

Enhanced Ferroelectricity of Hf‐Based Memcapacitors by Adopting Ti Insert‐Layer and C–V Measurement for Constructing Energy‐Efficient Reservoir Computing Network

Abstract Hf‐based ferroelectric memcapacitors only consume dynamic power with the merits of reliable nonvolatile storage and Si‐process compatibility, which is an outstanding artificial synapse for constructing energy‐efficient neuromorphic computing networks. In this paper, the ferroelectricity of...

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Bibliographic Details
Main Authors: Bo Chen, Yifang Wu, Yizhi Liu, Xiaopeng Li, Lu Tai, Pengpeng Sang, Jixuan Wu, Xuepeng Zhan, Jiezhi Chen
Format: Article
Language:English
Published: Wiley-VCH 2025-04-01
Series:Advanced Electronic Materials
Subjects:
C–V measurement
HZO ferroelectric film
reservoir computing
Ti insertion layers
Online Access:https://doi.org/10.1002/aelm.202400395
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Summary:Abstract Hf‐based ferroelectric memcapacitors only consume dynamic power with the merits of reliable nonvolatile storage and Si‐process compatibility, which is an outstanding artificial synapse for constructing energy‐efficient neuromorphic computing networks. In this paper, the ferroelectricity of Hf0.5Zr0.5O2 (HZO) memcapacitor is improved by the co‐optimization of process design and electrical measurement with various thicknesses of the Ti insertion layer and conditions of Capacitor–Voltage (C–V) tests. Material characterization indicates the Ti insertion layer reduces the m‐phase and increases the ratio of the o‐phase in HZO film. The wake‐up‐free behaviors are achieved in the Ti insertion layer memcapacitors with an endurance of ≈109 cycles. Furthermore, ferroelectric properties are further enhanced after C–V measurement with the 1nm‐thick Ti insertion layer showing the largest remanent polarization (2Pr≈41.02 µC cm−2). Subsequently, a full hardware‐implemented hierarchical parallel reservoir computing (RC) network is constructed using 34 HZO memcapacitive synapses. The proposed network achieves high recognition accuracy (≈96.10%) and low dynamic power consumption (≈0.15 fJ per input) with the MNIST dataset. These findings indicate the feasibility of developing a highly energy‐efficient, fully hardware‐implemented, hierarchical parallel RC neural network.
ISSN:2199-160X

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