The Design of a Low-Noise CMOS Image Sensor Using a Hybrid Single-Slope Analog-to-Digital Converter

The Design of a Low-Noise CMOS Image Sensor Using a Hybrid Single-Slope Analog-to-Digital Converter

In this study, we describe a low-noise complementary metal-oxide semiconductor (CMOS) image sensor (CIS) with a 10/11-bit hybrid single-slope analog-to-digital converter (SS-ADC). The proposed hybrid SS-ADC provides a resolution of 11 bits in low-light and 10 bits in high-light. To this end, in the...

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Bibliographic Details
Main Authors: Hyun Seon Choo, Da-Hyeon Youn, Hyunggyu Choi, Gi Yeol Kim, Soo Youn Kim
Format: Article
Language:English
Published: MDPI AG 2024-12-01
Series:Sensors
Subjects:
CMOS image sensor
correlated double sampling
double data rate
hybrid single-slope ADC
low noise
Online Access:https://www.mdpi.com/1424-8220/24/24/8131
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