Zhu, X., Chen, W., & Yuan, Y. Design of a Low-Latency <roman>d<italic>v</italic></roman>/<roman>d<italic>t</italic></roman> and <roman>d<italic>i</italic></roman>/<roman>d<italic>t</italic></roman> Closed-Loop Active Gate Driver for SiC MOSFETs With Simple Structure. IEEE.
Chicago Style (17th ed.) CitationZhu, Xuhao, Wu Chen, and Yubo Yuan. Design of a Low-Latency <roman>d<italic>v</italic></roman>/<roman>d<italic>t</italic></roman> and <roman>d<italic>i</italic></roman>/<roman>d<italic>t</italic></roman> Closed-Loop Active Gate Driver for SiC MOSFETs With Simple Structure. IEEE.
MLA (9th ed.) CitationZhu, Xuhao, et al. Design of a Low-Latency <roman>d<italic>v</italic></roman>/<roman>d<italic>t</italic></roman> and <roman>d<italic>i</italic></roman>/<roman>d<italic>t</italic></roman> Closed-Loop Active Gate Driver for SiC MOSFETs With Simple Structure. IEEE.