BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits
This paper proposed a logic synthesis method based on binary decision diagram (BDD) representation. The proposed method is optimized for dual-threshold independent-gate (DTIG) FinFET circuits. The algorithm of the BDD-based topology optimization is stated in detail. Some kinds of feature subgraph st...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2019-01-01
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| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2019/8292653 |
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| _version_ | 1832550278418661376 |
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| author | Haiyan Ni Jianping Hu Xuqiang Zhang Haotian Zhu |
| author_facet | Haiyan Ni Jianping Hu Xuqiang Zhang Haotian Zhu |
| author_sort | Haiyan Ni |
| collection | DOAJ |
| description | This paper proposed a logic synthesis method based on binary decision diagram (BDD) representation. The proposed method is optimized for dual-threshold independent-gate (DTIG) FinFET circuits. The algorithm of the BDD-based topology optimization is stated in detail. Some kinds of feature subgraph structures of a BDD are extracted by the extraction algorithm and then fed to mapping algorithm to get a final optimized circuit based on predefined DTIG FinFET logic gates. Some MCNC benchmark circuits are tested under the proposed synthesis method by comparing with ABC, DC tools. The simulations show that the proposed synthesis method can obtain performance improvement for DTIG FinFET circuits. |
| format | Article |
| id | doaj-art-67c25e28999a464b8bc948c2e5be3c71 |
| institution | Kabale University |
| issn | 0882-7516 1563-5031 |
| language | English |
| publishDate | 2019-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Active and Passive Electronic Components |
| spelling | doaj-art-67c25e28999a464b8bc948c2e5be3c712025-02-03T06:07:13ZengWileyActive and Passive Electronic Components0882-75161563-50312019-01-01201910.1155/2019/82926538292653BDD-Based Topology Optimization for Low-Power DTIG FinFET CircuitsHaiyan Ni0Jianping Hu1Xuqiang Zhang2Haotian Zhu3Faculty of Information Science and Technology, Ningbo University, Ningbo 315211, ChinaFaculty of Information Science and Technology, Ningbo University, Ningbo 315211, ChinaFaculty of Information Science and Technology, Ningbo University, Ningbo 315211, ChinaFaculty of Information Science and Technology, Ningbo University, Ningbo 315211, ChinaThis paper proposed a logic synthesis method based on binary decision diagram (BDD) representation. The proposed method is optimized for dual-threshold independent-gate (DTIG) FinFET circuits. The algorithm of the BDD-based topology optimization is stated in detail. Some kinds of feature subgraph structures of a BDD are extracted by the extraction algorithm and then fed to mapping algorithm to get a final optimized circuit based on predefined DTIG FinFET logic gates. Some MCNC benchmark circuits are tested under the proposed synthesis method by comparing with ABC, DC tools. The simulations show that the proposed synthesis method can obtain performance improvement for DTIG FinFET circuits.http://dx.doi.org/10.1155/2019/8292653 |
| spellingShingle | Haiyan Ni Jianping Hu Xuqiang Zhang Haotian Zhu BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits Active and Passive Electronic Components |
| title | BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits |
| title_full | BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits |
| title_fullStr | BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits |
| title_full_unstemmed | BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits |
| title_short | BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits |
| title_sort | bdd based topology optimization for low power dtig finfet circuits |
| url | http://dx.doi.org/10.1155/2019/8292653 |
| work_keys_str_mv | AT haiyanni bddbasedtopologyoptimizationforlowpowerdtigfinfetcircuits AT jianpinghu bddbasedtopologyoptimizationforlowpowerdtigfinfetcircuits AT xuqiangzhang bddbasedtopologyoptimizationforlowpowerdtigfinfetcircuits AT haotianzhu bddbasedtopologyoptimizationforlowpowerdtigfinfetcircuits |