Optimization of NoN-melt-back-etching and selectivity for selective area growth of GaN drain on Si (100) substrate
This work explores the dual-step epitaxial GaN (DSE-GaN) process for the selective area growth of GaN drains on Si (100) substrates, addressing critical challenges in melt-back etching and regrowth selectivity. The DSE-GaN process combines the superior material properties of GaN with the inherent ad...
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| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
AIP Publishing LLC
2025-05-01
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| Series: | AIP Advances |
| Online Access: | http://dx.doi.org/10.1063/5.0256900 |
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| Summary: | This work explores the dual-step epitaxial GaN (DSE-GaN) process for the selective area growth of GaN drains on Si (100) substrates, addressing critical challenges in melt-back etching and regrowth selectivity. The DSE-GaN process combines the superior material properties of GaN with the inherent advantages of the Si (100) substrate by utilizing GaN as the drain in the Si n-MOSFET. On the Si (100) substrate, the wide-bandgap GaN drain can be designed to enhance the device’s breakdown voltage or enable the integration of GaN-based light-emitting diodes or laser diodes. In this work, based on the Hertz–Knudsen model and our experiment, we determined a process window that eliminates melt-back etching and achieves full selectivity growth. Experimental results reveal that optimizing the growth temperature and trimethylgallium flow rate effectively suppresses the formation of Ga droplet and the non-selective growth of GaN grains. Finally, we successfully demonstrated the significant potential of Si n-MOSFETs with GaN drains. The fabricated devices, featuring a GaN drain-first architecture and demonstrating ID–VG characteristics, highlight the seamless integration of GaN’s wide-bandgap properties with silicon’s CMOS technology. This approach shows significant potential for radar, radio frequency, and optoelectronic applications by combining GaN’s high breakdown electric field and direct bandgap with the scalability of Si. Our findings establish a robust pathway for heterogeneous integration, advancing the development of high-power and high-frequency systems-on-chip technologies. |
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| ISSN: | 2158-3226 |