Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips
High power IGBT usually use multiple chips in parallel to achieve large current. The consistency of the dynamic and static current distribution of parallel chips is essential to improve the current level and reliability of devices.At first, the difference of package parasitic parameters caused by in...
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| Format: | Article |
| Language: | zho |
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State Grid Energy Research Institute
2019-08-01
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| Series: | Zhongguo dianli |
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| Online Access: | https://www.electricpower.com.cn/CN/10.11930/j.issn.1004-9649.201805131 |
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| _version_ | 1850037121131216896 |
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| author | Hao SHI Pengfei WU Xinling TANG Jianjun DONG Ronggang HAN Peng ZHANG |
| author_facet | Hao SHI Pengfei WU Xinling TANG Jianjun DONG Ronggang HAN Peng ZHANG |
| author_sort | Hao SHI |
| collection | DOAJ |
| description | High power IGBT usually use multiple chips in parallel to achieve large current. The consistency of the dynamic and static current distribution of parallel chips is essential to improve the current level and reliability of devices.At first, the difference of package parasitic parameters caused by inconsistent internal layout of paralleled IGBT chips is introduced in this paper. Secondly, combined with the equivalent circuit model of IGBT and its switching characteristics, the influence of parasitic parameters on the transient current distribution characteristics of parallel IGBT chips is analyzed. Then, the equivalent circuit model of parallel IGBT chip is established, and the simulation circuit is built by Synopsys Saber software. From the differences of package parasitic inductance parameters and package parasitic resistance parameters, the influence of parameters differences on the transient current distribution characteristics of parallel chip is analyzed. In this paper, the influence of various package parasitic parameters on the transient current distribution is considered comprehensively, which is of great significance for optimizing the transient current consistency of multi-chip parallel connection. |
| format | Article |
| id | doaj-art-58e56459c3d74497af493ff04c3a00ff |
| institution | DOAJ |
| issn | 1004-9649 |
| language | zho |
| publishDate | 2019-08-01 |
| publisher | State Grid Energy Research Institute |
| record_format | Article |
| series | Zhongguo dianli |
| spelling | doaj-art-58e56459c3d74497af493ff04c3a00ff2025-08-20T02:56:58ZzhoState Grid Energy Research InstituteZhongguo dianli1004-96492019-08-01528162510.11930/j.issn.1004-9649.201805131zgdl-52-3-shihaoInfluence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT ChipsHao SHI0Pengfei WU1Xinling TANG2Jianjun DONG3Ronggang HAN4Peng ZHANG5Global Energy Interconnection Research Institute Co. Ltd., Beijing 102209, ChinaGlobal Energy Interconnection Research Institute Co. Ltd., Beijing 102209, ChinaGlobal Energy Interconnection Research Institute Co. Ltd., Beijing 102209, ChinaState Grid Jincheng Electric Power Supply Company, Jincheng 033000, ChinaGlobal Energy Interconnection Research Institute Co. Ltd., Beijing 102209, ChinaGlobal Energy Interconnection Research Institute Co. Ltd., Beijing 102209, ChinaHigh power IGBT usually use multiple chips in parallel to achieve large current. The consistency of the dynamic and static current distribution of parallel chips is essential to improve the current level and reliability of devices.At first, the difference of package parasitic parameters caused by inconsistent internal layout of paralleled IGBT chips is introduced in this paper. Secondly, combined with the equivalent circuit model of IGBT and its switching characteristics, the influence of parasitic parameters on the transient current distribution characteristics of parallel IGBT chips is analyzed. Then, the equivalent circuit model of parallel IGBT chip is established, and the simulation circuit is built by Synopsys Saber software. From the differences of package parasitic inductance parameters and package parasitic resistance parameters, the influence of parameters differences on the transient current distribution characteristics of parallel chip is analyzed. In this paper, the influence of various package parasitic parameters on the transient current distribution is considered comprehensively, which is of great significance for optimizing the transient current consistency of multi-chip parallel connection.https://www.electricpower.com.cn/CN/10.11930/j.issn.1004-9649.201805131igbtparallel chipsparasitic inductanceparasitic resistancetransient current distribution |
| spellingShingle | Hao SHI Pengfei WU Xinling TANG Jianjun DONG Ronggang HAN Peng ZHANG Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips Zhongguo dianli igbt parallel chips parasitic inductance parasitic resistance transient current distribution |
| title | Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips |
| title_full | Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips |
| title_fullStr | Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips |
| title_full_unstemmed | Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips |
| title_short | Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips |
| title_sort | influence of package parasitic parameters on transient current distribution of paralleled igbt chips |
| topic | igbt parallel chips parasitic inductance parasitic resistance transient current distribution |
| url | https://www.electricpower.com.cn/CN/10.11930/j.issn.1004-9649.201805131 |
| work_keys_str_mv | AT haoshi influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips AT pengfeiwu influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips AT xinlingtang influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips AT jianjundong influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips AT rongganghan influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips AT pengzhang influenceofpackageparasiticparametersontransientcurrentdistributionofparalleledigbtchips |