TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands
The TDM Test Scheduler and TAM Optimization Toolkit is a novel, integrated, and user-friendly solution designed for engineers, researchers, and instructors working in the field of manufacturing tests. It effectively supports test planning for multicore, DVFS-based SoCs with multiple voltage islands,...
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| Format: | Article |
| Language: | English |
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MDPI AG
2025-04-01
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| Series: | Chips |
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| Online Access: | https://www.mdpi.com/2674-0729/4/2/17 |
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| author | Fotios Vartziotis |
| author_facet | Fotios Vartziotis |
| author_sort | Fotios Vartziotis |
| collection | DOAJ |
| description | The TDM Test Scheduler and TAM Optimization Toolkit is a novel, integrated, and user-friendly solution designed for engineers, researchers, and instructors working in the field of manufacturing tests. It effectively supports test planning for multicore, DVFS-based SoCs with multiple voltage islands, offering optimized solutions that minimize test costs while ensuring compliance with power and thermal constraints. The toolkit provides (a) a high-level language (HLL) for the intuitive representation of test processes, along with a smart syntax and logic checker for verification; (b) an advanced compilation and execution environment featuring two computationally efficient Time-Division Multiplexing (TDM)-specialized solvers; (c) a sophisticated Test Access Mechanism (TAM) optimization framework; (d) a customized visualization environment capable of depicting and animating power- and thermal-annotated test schedules; (e) a versatile testbed for educational and research activities. |
| format | Article |
| id | doaj-art-566060ff6382455e80d3ff6ea1f89e11 |
| institution | Kabale University |
| issn | 2674-0729 |
| language | English |
| publishDate | 2025-04-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Chips |
| spelling | doaj-art-566060ff6382455e80d3ff6ea1f89e112025-08-20T03:26:26ZengMDPI AGChips2674-07292025-04-01421710.3390/chips4020017TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage IslandsFotios Vartziotis0Department of Informatics and Telecommunications, University of Ioannina, 471 00 Arta, GreeceThe TDM Test Scheduler and TAM Optimization Toolkit is a novel, integrated, and user-friendly solution designed for engineers, researchers, and instructors working in the field of manufacturing tests. It effectively supports test planning for multicore, DVFS-based SoCs with multiple voltage islands, offering optimized solutions that minimize test costs while ensuring compliance with power and thermal constraints. The toolkit provides (a) a high-level language (HLL) for the intuitive representation of test processes, along with a smart syntax and logic checker for verification; (b) an advanced compilation and execution environment featuring two computationally efficient Time-Division Multiplexing (TDM)-specialized solvers; (c) a sophisticated Test Access Mechanism (TAM) optimization framework; (d) a customized visualization environment capable of depicting and animating power- and thermal-annotated test schedules; (e) a versatile testbed for educational and research activities.https://www.mdpi.com/2674-0729/4/2/17VLSI testingSoCTDMtest processtest scheduleTAM optimization |
| spellingShingle | Fotios Vartziotis TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands Chips VLSI testing SoC TDM test process test schedule TAM optimization |
| title | TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands |
| title_full | TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands |
| title_fullStr | TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands |
| title_full_unstemmed | TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands |
| title_short | TDM Test Scheduler and TAM Optimization Toolkit: An Integrated Framework for Test Processes of DVFS-Based SoCs with Multiple Voltage Islands |
| title_sort | tdm test scheduler and tam optimization toolkit an integrated framework for test processes of dvfs based socs with multiple voltage islands |
| topic | VLSI testing SoC TDM test process test schedule TAM optimization |
| url | https://www.mdpi.com/2674-0729/4/2/17 |
| work_keys_str_mv | AT fotiosvartziotis tdmtestschedulerandtamoptimizationtoolkitanintegratedframeworkfortestprocessesofdvfsbasedsocswithmultiplevoltageislands |