Comprehensive Hammering and Parasitic BJT Effects in Vertically Stacked DRAM

Comprehensive Hammering and Parasitic BJT Effects in Vertically Stacked DRAM

This study investigates the row hammer tolerance and potential degradation by capacitive crosstalk (CC) and parasitic bipolar junction transistor (BJT) effect in vertically stacked dynamic random-access memory (VS-DRAM) using technology computer-aided design (TCAD) simulations. The close arrangement...

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Bibliographic Details
Main Authors: Minki Suh, Minsang Ryu, Jonghyeon Ha, Minji Bang, Dabok Lee, Hojoon Lee, Hyunchul Sagong, Jungsik Kim
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Access
Subjects:
VS-DRAM
capacitive crosstalk
parasitic bipolar junction transistor
floating body
TCAD
Online Access:https://ieeexplore.ieee.org/document/10719998/
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https://ieeexplore.ieee.org/document/10719998/

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