A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)

In this paper, we propose a data-shifting neural network (DSNN) for the detection of abnormal heartbeats. Our study aims to identify six types of electrocardiogram (ECG) signals using the deep learning network. In order to enhance the detection accuracy, the DSNN is devised by doubling the input sig...

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Main Authors: Yuan-Ho Chen, Szi-Wen Chen, Hong-Wen Jian, Shinn-Yn Lin, Rou-Shayn Chen
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Access
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Online Access:https://ieeexplore.ieee.org/document/10411502/
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author Yuan-Ho Chen
Szi-Wen Chen
Hong-Wen Jian
Shinn-Yn Lin
Rou-Shayn Chen
author_facet Yuan-Ho Chen
Szi-Wen Chen
Hong-Wen Jian
Shinn-Yn Lin
Rou-Shayn Chen
author_sort Yuan-Ho Chen
collection DOAJ
description In this paper, we propose a data-shifting neural network (DSNN) for the detection of abnormal heartbeats. Our study aims to identify six types of electrocardiogram (ECG) signals using the deep learning network. In order to enhance the detection accuracy, the DSNN is devised by doubling the input signal using a data shifting scheme so that the amount of information for training may be adequately sufficient. Although the computational time doubles, the accuracy can be improved. When implemented using the Taiwan Semiconductor Manufacturing Company (TSMC) <inline-formula> <tex-math notation="LaTeX">$0.18-\mu m$ </tex-math></inline-formula> complementary metal oxide semiconductor (CMOS) process, the proposed DSNN chip has an operating frequency at 20 MHz with chip area of <inline-formula> <tex-math notation="LaTeX">$0.619 mm^{2}$ </tex-math></inline-formula> and maximum power dissipation <inline-formula> <tex-math notation="LaTeX">$0.75 mW$ </tex-math></inline-formula>. As a result, the proposed DSNN can substantially increase detection accuracy for the task of ECG heartbeat classification. Results obtained after applying the proposed circuit to the ECG signals drawn from the MIT-BIH arrhythmia database showed that it achieved a detection rate of 97.17&#x0025; with a small chip area, suggesting that it may be suitable for wearable or portable devices in healthcare.
format Article
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publishDate 2024-01-01
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spelling doaj-art-474bde1c1a914d2d81f48b9b7f50cee02025-08-20T03:13:07ZengIEEEIEEE Access2169-35362024-01-0112140051401310.1109/ACCESS.2024.335659010411502A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)Yuan-Ho Chen0https://orcid.org/0000-0001-5651-7584Szi-Wen Chen1https://orcid.org/0000-0001-6171-0493Hong-Wen Jian2Shinn-Yn Lin3https://orcid.org/0000-0002-3232-7994Rou-Shayn Chen4Department of Electronics Engineering, Chang Gung University, Taoyuan, TaiwanDepartment of Electronics Engineering, Chang Gung University, Taoyuan, TaiwanDepartment of Electronics Engineering, Chang Gung University, Taoyuan, TaiwanDepartment of Radiation Oncology, Chang Gung Memorial Hospital, Taoyuan, TaiwanNeuroscience Research Center, Chang Gung Memorial Hospital, Taoyuan, Linkou, TaiwanIn this paper, we propose a data-shifting neural network (DSNN) for the detection of abnormal heartbeats. Our study aims to identify six types of electrocardiogram (ECG) signals using the deep learning network. In order to enhance the detection accuracy, the DSNN is devised by doubling the input signal using a data shifting scheme so that the amount of information for training may be adequately sufficient. Although the computational time doubles, the accuracy can be improved. When implemented using the Taiwan Semiconductor Manufacturing Company (TSMC) <inline-formula> <tex-math notation="LaTeX">$0.18-\mu m$ </tex-math></inline-formula> complementary metal oxide semiconductor (CMOS) process, the proposed DSNN chip has an operating frequency at 20 MHz with chip area of <inline-formula> <tex-math notation="LaTeX">$0.619 mm^{2}$ </tex-math></inline-formula> and maximum power dissipation <inline-formula> <tex-math notation="LaTeX">$0.75 mW$ </tex-math></inline-formula>. As a result, the proposed DSNN can substantially increase detection accuracy for the task of ECG heartbeat classification. Results obtained after applying the proposed circuit to the ECG signals drawn from the MIT-BIH arrhythmia database showed that it achieved a detection rate of 97.17&#x0025; with a small chip area, suggesting that it may be suitable for wearable or portable devices in healthcare.https://ieeexplore.ieee.org/document/10411502/Very-large-scale integration implementation (VLSI)electrocardiogram (ECG)convolutional neural network (CNN)data-shifting neural network (DSNN)
spellingShingle Yuan-Ho Chen
Szi-Wen Chen
Hong-Wen Jian
Shinn-Yn Lin
Rou-Shayn Chen
A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
IEEE Access
Very-large-scale integration implementation (VLSI)
electrocardiogram (ECG)
convolutional neural network (CNN)
data-shifting neural network (DSNN)
title A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
title_full A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
title_fullStr A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
title_full_unstemmed A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
title_short A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)
title_sort very large scale integration vlsi chip design for abnormal heartbeat detection using a data shifting neural network dsnn
topic Very-large-scale integration implementation (VLSI)
electrocardiogram (ECG)
convolutional neural network (CNN)
data-shifting neural network (DSNN)
url https://ieeexplore.ieee.org/document/10411502/
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