A Power-Efficient 0.5668 TOPS/W Digital Logic Accelerator Implemented Using 40-nm CMOS Process for Underwater Object Recognition Usage

A Power-Efficient 0.5668 TOPS/W Digital Logic Accelerator Implemented Using 40-nm CMOS Process for Underwater Object Recognition Usage

DNN (deep neural network) and CNN (convolution neural network) have been widely used in real-time artificial intelligent (AI) applications, particularly image or video recognitions, because they have been proved physically in many occasions. However, most prior AI hardware works either suffered from...

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Bibliographic Details
Main Authors: Chua-Chin Wang, Shih-Heng Luo, Hsin-Che Wu, Ralph Gerard B. Sangalang, Chewn-Pu Jou, Harry Hsia, Lan-Chou Cho
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Deep neural networks (DNN)
digital logic accelerator (DLA)
high degree of parallelism
underwater object recognition
low power
Online Access:https://ieeexplore.ieee.org/document/10877824/
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