Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures
This paper focuses on how to efficiently reduce power consumption in coarse-grained reconfigurable designs, to allow their effective adoption in heterogeneous architectures supporting and accelerating complex and highly variable multifunctional applications. We propose a design flow for this kind of...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2016-01-01
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| Series: | Journal of Electrical and Computer Engineering |
| Online Access: | http://dx.doi.org/10.1155/2016/4237350 |
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| _version_ | 1832556459413471232 |
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| author | Francesca Palumbo Tiziana Fanni Carlo Sau Paolo Meloni Luigi Raffo |
| author_facet | Francesca Palumbo Tiziana Fanni Carlo Sau Paolo Meloni Luigi Raffo |
| author_sort | Francesca Palumbo |
| collection | DOAJ |
| description | This paper focuses on how to efficiently reduce power consumption in coarse-grained reconfigurable designs, to allow their effective adoption in heterogeneous architectures supporting and accelerating complex and highly variable multifunctional applications. We propose a design flow for this kind of architectures that, besides their automatic customization, is also capable of determining their optimal power management support. Power and clock gating implementation costs are estimated in advance, before their physical implementation, on the basis of the functional, technological, and architectural parameters of the baseline design. Experimental results, on 90 and 45 nm CMOS technologies, demonstrate that the proposed approach guides the designer towards optimal implementation. |
| format | Article |
| id | doaj-art-3a2fd437fb1d49a9a2076b00f570309d |
| institution | Kabale University |
| issn | 2090-0147 2090-0155 |
| language | English |
| publishDate | 2016-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Journal of Electrical and Computer Engineering |
| spelling | doaj-art-3a2fd437fb1d49a9a2076b00f570309d2025-02-03T05:45:19ZengWileyJournal of Electrical and Computer Engineering2090-01472090-01552016-01-01201610.1155/2016/42373504237350Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable ArchitecturesFrancesca Palumbo0Tiziana Fanni1Carlo Sau2Paolo Meloni3Luigi Raffo4POLCOMING, Information Engineering Unit, University of Sassari, Sassari, ItalyDepartment of Electrical and Electronic Engineering (DIEE), University of Cagliari, Cagliari, ItalyDepartment of Electrical and Electronic Engineering (DIEE), University of Cagliari, Cagliari, ItalyDepartment of Electrical and Electronic Engineering (DIEE), University of Cagliari, Cagliari, ItalyDepartment of Electrical and Electronic Engineering (DIEE), University of Cagliari, Cagliari, ItalyThis paper focuses on how to efficiently reduce power consumption in coarse-grained reconfigurable designs, to allow their effective adoption in heterogeneous architectures supporting and accelerating complex and highly variable multifunctional applications. We propose a design flow for this kind of architectures that, besides their automatic customization, is also capable of determining their optimal power management support. Power and clock gating implementation costs are estimated in advance, before their physical implementation, on the basis of the functional, technological, and architectural parameters of the baseline design. Experimental results, on 90 and 45 nm CMOS technologies, demonstrate that the proposed approach guides the designer towards optimal implementation.http://dx.doi.org/10.1155/2016/4237350 |
| spellingShingle | Francesca Palumbo Tiziana Fanni Carlo Sau Paolo Meloni Luigi Raffo Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures Journal of Electrical and Computer Engineering |
| title | Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures |
| title_full | Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures |
| title_fullStr | Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures |
| title_full_unstemmed | Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures |
| title_short | Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures |
| title_sort | modelling and automated implementation of optimal power saving strategies in coarse grained reconfigurable architectures |
| url | http://dx.doi.org/10.1155/2016/4237350 |
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