Demonstration of Gate-Related Trap Characterization in 4H-SiC MOSFETs Using Gate Stress Leakage Current
In this work, we demonstrate an innovative technique to characterize the gate-related traps in 4H-SiC MOSFETs by using the gate voltage stress-induced gate leakage current (GSLC) based on the Bayesian Deconvolution technique. We compare the proposed methodology against several approaches to characte...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10734141/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|