Implementing FFE-MLSD With Improved BER and Reduced Complexity for Long-Reach PAM4 Wireline Receivers
This paper proposes a PAM4 receiver DSP architecture based on Feed-Forward Equalizer (FFE) and Maximum Likelihood Sequence Detector (MLSD), targeting improved bit-error-rate (BER) performance and reduced hardware complexity. Two key contributions are presented: (1) an FFE tap coefficient optimizatio...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/11009014/ |
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