MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture
The circuit switched optical network on chip (ONoC) is popularly employed since the optical buffer is not available. However, this technique suffers from limited transmission bandwidth, high setup-time overhead, and high network resource contention, which consequentially induces long latency and deg...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2017-01-01
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| Series: | IEEE Photonics Journal |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/7814144/ |
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