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    A Hardware Accelerator for Real-Time Processing Platforms Used in Synthetic Aperture Radar Target Detection Tasks by Yue Zhang, Yunshan Tang, Yue Cao, Zhongjun Yu

    Published 2025-02-01
    “…This accelerator proposes a Process Engine (PE) suitable for multidimensional convolution parallel computing, making full use of Field-Programmable Gate Array (FPGA) computing resources to reduce convolution computing time. …”
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