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    Automatic Lane Line Detection System Based on Artificial Intelligence by Gaoqing Ji, Yunchang Zheng

    Published 2022-01-01
    “…Thirdly, the YOLOv3’s backbone is changed by adopting Darknet-49 architecture. Finally, parameters of anchor and loss function are optimized so that they focus on detecting lane line. …”
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    FPGA multi-unit parallel optimization and implementation of post-quantum cryptography CRYSTALS-Kyber by Bin LI, Xiaojie CHEN, Feng FENG, Qinglei ZHOU

    Published 2022-02-01
    “…In lattice-based post-quantum cryptography, polynomial multiplication is complicated and time-consuming.In order to improve the computational efficiency of lattice cryptography in practical applications, an FPGA multi-unit parallel optimization and implementation of post-quantum cryptography CRYSTALS-Kyber was proposed.Firstly, the flow of Kyber algorithm was described and the execution of NTT, INTT and CWM were analyzed.Secondly, the overall structure of FPGA was given, the butterfly arithmetic unit was designed by pipeline technology, and the Barrett modulus reduction and CWM scheduling optimization were used to improve the calculation efficiency.At the same time, 32 butterfly arithmetic units were executed in parallel, which shortens the overall calculation cycle.Finally, the multi-RAM channel was optimized to improve the memory access efficiency with alternate data access control and RAM resource reuse.In addition, with the loosely coupled architecture, the overall operation scheduling was realized by DMA communication.The experimental results and analysis show that the proposed scheme implemented can complete NTT, INTT and CWM operations within 44, 49, and 163 clock cycles, which is superior to other schemes and has high energy efficiency ratio.…”
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