Showing 1 - 5 results of 5 for search '"parasitic inductance"', query time: 0.03s Refine Results
  1. 1
    Layout of Laminated Bus Bar for Diode Neutral Point Clamped Three-level Inverter

    Layout of Laminated Bus Bar for Diode Neutral Point Clamped Three-level Inverter

    Published 2014-01-01
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  2. 2
    Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips

    Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips by Hao SHI, Pengfei WU, Xinling TANG, Jianjun DONG, Ronggang HAN, Peng ZHANG

    Published 2019-08-01
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  3. 3
    Simulation Analysis and Optimization of Board-Level Power Integrity Based on PDN Impedance

    Simulation Analysis and Optimization of Board-Level Power Integrity Based on PDN Impedance by YANG Guotao, LIU Haiyang, LI Ming

    Published 2024-10-01
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  4. 4
    A Fast Calculation Method of Parasitic Inductances in the Bus Circuit of Double- IGBT Module Based on Double-pulse Experiment

    A Fast Calculation Method of Parasitic Inductances in the Bus Circuit of Double- IGBT Module Based on Double-pulse Experiment by HU Zhenqiu, PENG Zaiwu, HUANG Xuanfang, YIN Zhigang, HUANG Yishan

    Published 2018-01-01
    Subjects: “…parasitic inductance…”
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  5. 5
    Effects of parasitic inductances in series-parallel topology with SiC MOFETs applied to a buck converter

    Effects of parasitic inductances in series-parallel topology with SiC MOFETs applied to a buck converter by A. Escobar-Mejía, A.J. Marín-Hurtado, J.W. Giraldo-Rendón, J.J. Marulanda-Durango, M. Holguín-Londoño

    Published 2025-06-01
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