Showing 1 - 2 results of 2 for search '"neural compact model"', query time: 0.03s Refine Results
  1. 1
    Impact of Strain on Sub-3 nm Gate-All-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach

    Impact of Strain on Sub-3 nm Gate-All-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach by Ji Hwan Lee, Kihwan Kim, Kyungjin Rim, Soogine Chong, Hyunbo Cho, Saeroonter Oh

    Published 2024-01-01
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  2. 2
    Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling

    Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling by Chanwoo Park, Hyunbo Cho, Jungwoo Lee

    Published 2024-01-01
    Subjects: “…Neural compact models…”
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