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Integrated Photonic Neural Networks for Equalizing Optical Communication Signals: A Review
Published 2025-01-01Subjects: Get full text
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62
NOVEL PRINCIPLES OF MICROWAVE BAND RADIOELECTRONIC DEVICES DESIGN WITH THE USE OF MICROWAVE PHOTONICS TECHNOLOGY
Published 2016-02-01Subjects: Get full text
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63
Microelectronic Circuit Design /
Published 2016Subjects: “…Integrated circuits Design and construction. 1647…”
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64
0.5 V Digitally-Tunable Filters for Biomedical Applications Exploiting Segmented Duty-Cycled Resistors
Published 2025-01-01Subjects: Get full text
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65
An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation
Published 2021-10-01Subjects: Get full text
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66
Si Substrate Backside—An Emerging Physical Attack Surface for Secure ICs in Flip Chip Packaging
Published 2024-01-01Subjects: Get full text
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67
Design and validation of a-SiC/SiN hybrid photonic platform for integrated quantum photonics
Published 2024-01-01Subjects: “…quantum photonic integrated circuits…”
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68
A 0.6 V 2.7 mW 94.3% locking range injection‐locked frequency divider using modified varactor‐less Colpitts oscillator topology
Published 2021-10-01Subjects: “…CMOS integrated circuits…”
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69
Delayered IC image analysis with template‐based Tanimoto Convolution and Morphological Decision
Published 2022-03-01Subjects: Get full text
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70
A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)
Published 2021-11-01Subjects: Get full text
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71
A Chisel Generator for Standardized 3-D Die-to-Die Interconnects
Published 2024-01-01Subjects: “…3-D integrated circuits…”
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72
Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review
Published 2022-01-01Subjects: “…power management integrated circuits (PMICs)…”
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73
Lightweight AES Design for IoT Applications: Optimizations in FPGA and ASIC With DFA Countermeasure Strategies
Published 2025-01-01Subjects: “…application specific integrated circuits (ASIC)…”
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74
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Plasmonically-enhanced reconfigurable photodetector based on graphene/Sb2S3 heterojunction
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76
Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology
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77
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Statistical Timing Analysis for Subthreshold Circuit Based on Bayesian Inference
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80
Design, Simulation, and Experimental Verification of a Destruction Mechanism of Transient Electronic Devices
Published 2020-01-01“…The simulation and experimental results confirm the feasibility of the structure in quick destruction, which lays the foundation for developing instantaneous-failure integrated circuit products to meet information security applications.…”
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