Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels by Ying Zhang, Minghui Ge, Xin Chen, Jiaqi Yao, Zhiming Mao

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Performance evaluation of the SM4 cipher based on field‐programmable gate array implementation by Sa'ed Abed, Reem Jaffal, Bassam Jamil Mohd, Mohammad Alshayeji

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Fast approximation of the top‐k items in data streams using FPGAs by Ali Ebrahim, Jalal Khalifat

Subjects: “…field programmable gate arrays…”
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Accelerating Deep Neural Networks implementation: A survey by Meriam Dhouibi, Ahmed Karim Ben Salem, Afef Saidi, Slim Ben Saoud

Subjects: “…field programmable gate arrays…”
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Accelerating the SM3 hash algorithm with CPU‐FPGA Co‐Designed architecture by Xiaoying Huang, Zhichuan Guo, Mangu Song, Xuewen Zeng

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An efficient loop tiling framework for convolutional neural network inference accelerators by Hongmin Huang, Xianghong Hu, Xueming Li, Xiaoming Xiong

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Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication by Geetam Singh Tomar, Marcus Llyode George, Abhineet Singh Tomar

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FPGA‐based implementation of floating point processing element for the design of efficient FIR filters by Tintu Mary John, Shanty Chacko

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Strengthened 32‐bit AES implementation: Architectural error correction configuration with a new voting scheme by Saeideh Sheikhpur, Mahdi Taheri, Mohammad Saeed Ansari, Ali Mahani

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Coupled variable‐input LCG and clock divider‐based large period pseudo‐random bit generator on FPGA by Mangal D. Gupta, Rajeev K. Chauhan

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FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing by Sayantam Sarkar, Satish S. Bhairannawar, Raja K.B.

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Efficient FPGA based architecture for high‐order FIR filtering using simultaneous DSP and LUT reduced utilization by Mountassar Maamoun, Adnane Hassani, Samir Dahmani, Hocine Ait Saadi, Ghania Zerari, Noureddine Chabini, Rachid Beguenane

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Design of a 128‐channel transceiver hardware for medical ultrasound imaging systems by Jayaraj Kidav, Perumal M. Pillai, Deepak V, Sreejeesh S. G

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A novel FPGA‐Based Bi input‐reduced order extended Kalman filter for speed‐sensorless direct torque control of induction motor with constant switching frequency controller by Remzi Inan

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Lightweight AES Design for IoT Applications: Optimizations in FPGA and ASIC With DFA Countermeasure Strategies by Salman Ahmed, Nabihah Ahmad, Nasir Ali Shah, Ghulam E. Mustafa Abro, Ardhi Wijayanto, Abdinasir Hirsi, Abdul Rehman Altaf

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Method for synthesizing a logic element that implements several functions simultaneously by S. I. Sovetov, S. F. Tyurin

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Efficient Hardware Implementation of a Multi-Layer Gradient-Free Online-Trainable Spiking Neural Network on FPGA by Ali Mehrabi, Yeshwanth Bethi, Andre van Schaik, Andrew Wabnitz, Saeed Afshar

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Portable and Cost-Effective Handheld Ultrasound System Utilizing FPGA-Based Synthetic Aperture Imaging by Wenping Wang, Ziliang Feng

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Field‐programmable gate array acceleration of the Tersoff potential in LAMMPS by Quan Deng, Qiang Liu

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FPGA-Based Distributed Union-Find Decoder for Surface Codes by Namitha Liyanage, Yue Wu, Siona Tagare, Lin Zhong

Subjects: “…Field-programmable gate array (FPGA)…”
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