Verification of serialising instructions for security against transient execution attacks by Kushal K. Ponugoti, Sudarshan K. Srinivasan, Nimish Mathure

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Rapid Fluid Velocity Field Prediction in Microfluidic Mixers via Nine Grid Network Model by Qian Li, Yuwei Chen, Taotao Sun, Junchao Wang

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VLSI architecture design of motion compensation for MPEG-4 by LIU Long, HAN Chong-zhao, WANG Zhan-hui

“…In the light of complex control, high throughput and difficult implementation of motion compensation of MPEG-4 decoding, a motion compensation （MC） circuit solving the timing and I/O of decoding was presented for MPEG-4.The VLSI architecture and implementation in terms of VHDL were designed in the Xilinx ISE6.1 i environment and some simulations were carried out in tools of electronic design automation （EDA）. The experimental results show that the VLSI processor designed can perform correct logic functions and can achieve a real-time coding for MPEG-4 Core Profile and Level 2.…”
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Digital Phase-Locked Loops: Exploring Different Boundaries by Yuncheng Zhang, Dingxin Xu, Kenichi Okada

“…This article delves into several key directions of DPLL research: improvements in PLL performance through digital methods, the automation of PLL design using commercial electronic design automation (EDA) tools, and innovative approaches for using low-frequency references in wireless applications. …”
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