SRAM and Mixed-Signal Logic With Noise Immunity in 3-nm Nano-Sheet Technology by Rajiv V. Joshi, J. Frougier, Alberto Cestero, Crystal Castellanos, Sudipto Chakraborty, Carl Radens, M. Silvestre, S. Lucarini, I. Ahsan, E. Leobandung

Subjects: “…Compute-in-memory (CIM)…”
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Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches by Raman Hissariya, Debanjan Bhowmik

Subjects: “…Compute-in-memory (CIM) arrays…”
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Co-Optimization of Power Delivery Network Design for 3-D Heterogeneous Integration of RRAM-Based Compute In-Memory Accelerators by Madison Manley, James Read, Ankit Kaul, Shimeng Yu, Muhannad Bakir

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A High-Efficiency Charge-Domain Compute-in-Memory 1F1C Macro Using 2-bit FeFET Cells for DNN Processing by Nellie Laleni, Franz Muller, Gonzalo Cunarro, Thomas Kampfe, Taekwang Jang

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Ferroelectric Transistor-Based Synaptic Crossbar Arrays: The Impact of Ferroelectric Thickness and Device-Circuit Interactions by Chunguang Wang, Sumeet Kumar Gupta

Subjects: “…Computing-in-memory (CiM)…”
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Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory by Xianggao Wang, Na Wei, Shifan Gao, Wenhao Wu, Yi Zhao

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MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory by Tzuping Huang, Linran Zhao, Yiming Han, Hai Li, Ian A. Young, Yaoyao Jia

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