Review on Resistive Termination Techniques Driven by Wireline Channel Behaviors by Changjae Moon, Minsoo Choi, Myungguk Lee, Byungsub Kim

“…Their impacts vary a lot depending on the types of interconnects and the circuits. Therefore, termination impedances must be appropriately designed for the target applications. …”
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High-Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions by Shenggao Li, Mu-Shan Lin, Wei-Chih Chen, Chien-Chun Tsai

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Digital Phase-Locked Loops: Exploring Different Boundaries by Yuncheng Zhang, Dingxin Xu, Kenichi Okada

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An Overview of Hybrid DC–DC Converters: From Seeds to Leaves by Yan Lu, Junwei Huang, Zhiguo Tong, Tingxu Hu, Wen-Liang Zeng, Mo Huang, Xiangyu Mao, Guigang Cai

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High-Speed Wireline Links—Part II: Optimization and Performance Assessment by Hossein Shakiba, Davide Tonietto, Ali Sheikholeslami

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Beyond 200-Gb/s PAM4 ADC and DAC-Based Transceiver for Wireline and Linear Optics Applications by Ahmad Khairi, Amir Laufer, Ilia Radashkevich, Yoel Krupnik, Jihwan Kim, Tali Warshavsky Grafi, Ajay Balankutty, Yaniv Sabag, Yoav Segal, Udi Virobnik, Mike Peng Li, Itamar Levin, Yosef Ben Ezra, Ariel Cohen

“…System considerations, circuit architecture, and design implementation of wireline and linear optics transceivers capable of supporting data-rates beyond 200 Gb/s are presented. …”
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Recent Advances in Ultrahigh-Speed Wireline Receivers With ADC-DSP-Based Equalizers by Seoyoung Jang, Jaewon Lee, Yujin Choi, Donggeun Kim, Gain Kim

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The Problem of Spurious Emissions in 5G FR2 Phased Arrays, and a Solution Based on an Upmixer With Embedded LO Leakage Cancellation by Arun Paidimarri, Yujiro Tojo, Caglar Ozdag, Alberto Valdes-Garcia, Bodhisatwa Sadhu

“…We then present some key radio architecture and circuit design considerations to help meet these emission requirements. …”
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A Readout Scheme for PCM-Based Analog In-Memory Computing With Drift Compensation Through Reference Conductance Tracking by Alessio Antolini, Andrea Lico, Francesco Zavalloni, Eleonora Franchi Scarselli, Antonio Gnudi, Mattia Luigi Torres, Roberto Canegallo, Marco Pasotti

“…Accuracy drop due to circuits mismatch and variability involved in the computational chain are minimized with an optimized iterative program-and-verify algorithm applied to the phase-change memory (PCM) devices. …”
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SRAM and Mixed-Signal Logic With Noise Immunity in 3-nm Nano-Sheet Technology by Rajiv V. Joshi, J. Frougier, Alberto Cestero, Crystal Castellanos, Sudipto Chakraborty, Carl Radens, M. Silvestre, S. Lucarini, I. Ahsan, E. Leobandung

“…A modular 4.26 Mb SRAM based on a 82 Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3-nm nanosheet (NS) technology. Designed macros utilize new circuits for supply boosting, read, and write assist techniques. …”
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E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation by Saeed Seyedfaraji, Salar Shakibhamedan, Amire Seyedfaraji, Baset Mesgari, Nima Taherinejad, Axel Jantsch, Semeen Rehman

“…This eliminates the need for an additional digital-to-analog converter (DAC) in the design. Furthermore, the SRAM-based logical weight encoding scheme we present reduces the reliance on capacitance-based techniques, which typically introduce area overhead in the circuit. …”
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COUNTERREENGINEERING OF ELECTRONIC DEVICES by M. S. Kostin, D. S. Vorunichev, D. A. Korzh

“…The basic process design for the reengineering of multilayer printed circuits of radioelectronic products is presented. …”
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A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS by Nabihah Ahmad, Rezaul Hasan

“…The XOR gate utilizes six transistors to achieve a compact circuit design and was fabricated using the 130 nm IBM CMOS process. …”
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Fast Attitude Maneuver of a Flexible Spacecraft with Passive Vibration Control Using Shunted Piezoelectric Transducers by Bassam A. Albassam

“…The attitude control torque is produced using either the reaction wheels contained inside the rigid hub or jet thrusters mounted outside it. The control design process starts with deriving the nonlinear partial differential equations of motion for the spacecraft using Hamilton’s principle which accounts for the electromechanical coupling and the presence of resistive or resistive-inductive circuits. …”
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CRLH Transmission Lines for Telecommunications: Fast and Effective Modeling by Juanjuan Gao, Guizhen Lu

“…The responses of distributed prototype and extracted equivalent LC circuit model are in good agreement. The equivalent circuit modeling can improve the degree of freedom in the CRLH TLs design. …”
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Passive On-Chip Components for Fully Integrated Silicon RF VCOs by Aristides Kyranas, Yannis Papananos

“…The operation of on-chip inductors and variable capacitors is outlined along with simple electrical equivalent circuits suitable for hand calculations. Design examples of passive devices operating at 5 and 6 GHz in a commercial HBT BiCMOS process are also presented. …”
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Low-power artificial neuron networks with enhanced synaptic functionality using dual transistor and dual memristor. by Keerthi Nalliboyina, Sakthivel Ramachandran

“…The suggested circuit employs memristor-based artificial neurons with Dual Transistor and Dual Memristor (DTDM) synapse circuit. …”
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Optimization of Intelligent Management System for Crafts Production Based on Internet of Things by Xiaojiang Zhou, Keqi Li

“…The design and implementation of the system hardware are introduced by focusing on the functional circuits of various sensors of the data collection terminal, The functional circuit of the wireless communication module CC2530, the functional circuit of the microprocessor STM32, and the functional circuit of the collection terminal. …”
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Magnetic Behavior of Sintered NdFeB Magnets on a Long-Term Timescale by Minna Haavisto, Sampo Tuominen, Timo Santa-Nokki, Harri Kankaanpää, Martti Paju, Pekka Ruuskanen

“…Open-circuit tests seem to give bigger losses than closed-circuit tests in cases where the permeance coefficient of the open-circuit sample is considered to be the average permeance coefficient, calculated according to the dimensions of the magnet.…”
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Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell by Aishwarya K, Lakshmi B

“…The effect of single event transient (SET) on 6T SRAM cell employing a 20 nm silicon-based junctionless tunneling field effect transistor (JLTFET) is explored for the first time. JLTFET-based SRAM circuit is designed using the look up table-based Verilog A code obtained from TCAD values of the device. …”
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