Ultrahigh voltage-gradient ZnO-based varistor ceramics via hybrid cold sintering process/spark plasma sintering and post-annealing process
A high voltage gradient (Vg) of ZnO-based varistor ceramics is critical for realizing miniaturized and lightweight overvoltage protection devices. However, improving Vg of ZnO-based varistor ceramics through conventional high-temperature sintering process remains a significant challenge. Here, we pr...
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| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Tsinghua University Press
2025-05-01
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| Series: | Journal of Advanced Ceramics |
| Subjects: | |
| Online Access: | https://www.sciopen.com/article/10.26599/JAC.2025.9221065 |
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| Summary: | A high voltage gradient (Vg) of ZnO-based varistor ceramics is critical for realizing miniaturized and lightweight overvoltage protection devices. However, improving Vg of ZnO-based varistor ceramics through conventional high-temperature sintering process remains a significant challenge. Here, we present a strategy to fabricate ultrahigh voltage-gradient ZnO-based varistor ceramics by combining cold sintering process/spark plasma sintering (CSP–SPS) with post-annealing process. Employing CSP–SPS, the ZnO-based varistor ceramics were initially densified at 300 °C and subsequently annealed at a low temperature of 700–900 °C. CSP–SPS technique combined with a low annealing temperature enables the production of ZnO-based varistor ceramics with fine and homogeneous microstructures, while suppressing the volatilization of Bi-rich phases at grain boundaries. This approach achieves the ultrahigh Vg of ~1832.71 V/mm, high nonlinear coefficient (α) of ~106.69, and low leakage current density (JL) of less than 0.2 μA/cm2. This work shows that the integration of CSP–SPS and post-annealing provides a promising way to design ZnO-based varistor ceramics with ultrahigh Vg. |
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| ISSN: | 2226-4108 2227-8508 |