2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain
We propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the...
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| Format: | Article |
| Language: | English |
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Wiley
2014-01-01
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| Series: | The Scientific World Journal |
| Online Access: | http://dx.doi.org/10.1155/2014/967181 |
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| _version_ | 1832563674021101568 |
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| author | Changhyun Lee Changkun Park |
| author_facet | Changhyun Lee Changkun Park |
| author_sort | Changhyun Lee |
| collection | DOAJ |
| description | We propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the feasibility of the proposed structure, we designed a 2.4 GHz CMOS power amplifier with a 0.18 μm RFCMOS process for polar transmitter applications. The measured power added efficiency is 34.9%, while the saturated output power is 23.32 dBm. The designed chip size is 1.4×0.6 mm2. |
| format | Article |
| id | doaj-art-f5f50967ad10424a8adc366693574687 |
| institution | Kabale University |
| issn | 2356-6140 1537-744X |
| language | English |
| publishDate | 2014-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | The Scientific World Journal |
| spelling | doaj-art-f5f50967ad10424a8adc3666935746872025-02-03T01:12:56ZengWileyThe Scientific World Journal2356-61401537-744X2014-01-01201410.1155/2014/9671819671812.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance GainChanghyun Lee0Changkun Park1School of Electronic Engineering, College of Information Technology, Soongsil University, 551 Sangdo-Dong, Dongjak-Gu, Seoul 156-743, Republic of KoreaSchool of Electronic Engineering, College of Information Technology, Soongsil University, 551 Sangdo-Dong, Dongjak-Gu, Seoul 156-743, Republic of KoreaWe propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the feasibility of the proposed structure, we designed a 2.4 GHz CMOS power amplifier with a 0.18 μm RFCMOS process for polar transmitter applications. The measured power added efficiency is 34.9%, while the saturated output power is 23.32 dBm. The designed chip size is 1.4×0.6 mm2.http://dx.doi.org/10.1155/2014/967181 |
| spellingShingle | Changhyun Lee Changkun Park 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain The Scientific World Journal |
| title | 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain |
| title_full | 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain |
| title_fullStr | 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain |
| title_full_unstemmed | 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain |
| title_short | 2.4 GHz CMOS Power Amplifier with Mode-Locking Structure to Enhance Gain |
| title_sort | 2 4 ghz cmos power amplifier with mode locking structure to enhance gain |
| url | http://dx.doi.org/10.1155/2014/967181 |
| work_keys_str_mv | AT changhyunlee 24ghzcmospoweramplifierwithmodelockingstructuretoenhancegain AT changkunpark 24ghzcmospoweramplifierwithmodelockingstructuretoenhancegain |