Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends
The paper presents a control strategy for balancing DC-link capacitor voltages in a five-level hybrid diode-clamped (5L-HDC) inverter, consisting of two half-bridges and diode-clamped cells. The inverter experiences capacitor voltage imbalance, particularly in the middle capacitors, which naturally...
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2025-01-01
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| Online Access: | https://ieeexplore.ieee.org/document/10918991/ |
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| author | Min-Seok Kim Dinh Du To Dong-Choon Lee |
| author_facet | Min-Seok Kim Dinh Du To Dong-Choon Lee |
| author_sort | Min-Seok Kim |
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| description | The paper presents a control strategy for balancing DC-link capacitor voltages in a five-level hybrid diode-clamped (5L-HDC) inverter, consisting of two half-bridges and diode-clamped cells. The inverter experiences capacitor voltage imbalance, particularly in the middle capacitors, which naturally discharge due to voltage drift under the level-shifted (LS) PWM scheme, especially with passive front-end elements like diode rectifiers. To mitigate this issue, a capacitor voltage balancing strategy using the carrier-overlapped PWM (COPWM) technique is proposed. This approach generates multiple voltage levels per carrier period, ensuring effective voltage regulation without requiring an auxiliary circuit. The proposed method is compared with two other balancing strategies: LSPWM scheme with an auxiliary circuit and the finite control set model predictive control (FCS-MPC) technique, in terms of THD and power losses. In addition, a comprehensive evaluation is conducted on a 5-kV/1-MVA three-phase system, comparing the 5L-HDC inverter with balancing controls against other five-level inverter topologies. The assessment includes component count, cost, THD, and power losses, highlighting performance and economic trade-offs. The 5L-HDC inverter achieves cost reductions of 14.2%, 15%, 25.4%, and 4.3% compared to the 5L-NPC, 5L-ANPC, 5L-DFC, and 5L-HFC inverters, respectively. The effectiveness of the proposed method in regulating DC-link capacitor voltages is validated through experimental results under various operating conditions. |
| format | Article |
| id | doaj-art-ee38111c3de44b079dc43d487b4aa885 |
| institution | OA Journals |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
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| series | IEEE Access |
| spelling | doaj-art-ee38111c3de44b079dc43d487b4aa8852025-08-20T02:06:46ZengIEEEIEEE Access2169-35362025-01-0113455774559310.1109/ACCESS.2025.354976010918991Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-EndsMin-Seok Kim0Dinh Du To1https://orcid.org/0009-0008-3915-5655Dong-Choon Lee2https://orcid.org/0000-0003-0618-7630Inverter Engineering Design Team, Hyundai Motor Company, Hwaseong-si, South KoreaDepartment of Electrical Engineering, Yeungnam University, Gyeongsan-si, Gyeongsangbuk-do, South KoreaDepartment of Electrical Engineering, Yeungnam University, Gyeongsan-si, Gyeongsangbuk-do, South KoreaThe paper presents a control strategy for balancing DC-link capacitor voltages in a five-level hybrid diode-clamped (5L-HDC) inverter, consisting of two half-bridges and diode-clamped cells. The inverter experiences capacitor voltage imbalance, particularly in the middle capacitors, which naturally discharge due to voltage drift under the level-shifted (LS) PWM scheme, especially with passive front-end elements like diode rectifiers. To mitigate this issue, a capacitor voltage balancing strategy using the carrier-overlapped PWM (COPWM) technique is proposed. This approach generates multiple voltage levels per carrier period, ensuring effective voltage regulation without requiring an auxiliary circuit. The proposed method is compared with two other balancing strategies: LSPWM scheme with an auxiliary circuit and the finite control set model predictive control (FCS-MPC) technique, in terms of THD and power losses. In addition, a comprehensive evaluation is conducted on a 5-kV/1-MVA three-phase system, comparing the 5L-HDC inverter with balancing controls against other five-level inverter topologies. The assessment includes component count, cost, THD, and power losses, highlighting performance and economic trade-offs. The 5L-HDC inverter achieves cost reductions of 14.2%, 15%, 25.4%, and 4.3% compared to the 5L-NPC, 5L-ANPC, 5L-DFC, and 5L-HFC inverters, respectively. The effectiveness of the proposed method in regulating DC-link capacitor voltages is validated through experimental results under various operating conditions.https://ieeexplore.ieee.org/document/10918991/Capacitor voltage balancing controlcarrier-overlapped PWMlevel-shifted PWMmodel predictive controlmedium voltage applicationmultilevel inverter |
| spellingShingle | Min-Seok Kim Dinh Du To Dong-Choon Lee Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends IEEE Access Capacitor voltage balancing control carrier-overlapped PWM level-shifted PWM model predictive control medium voltage application multilevel inverter |
| title | Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends |
| title_full | Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends |
| title_fullStr | Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends |
| title_full_unstemmed | Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends |
| title_short | Balancing Control of DC-Link Capacitor Voltages for Five-Level Hybrid Diode-Clamped Inverters With Passive Front-Ends |
| title_sort | balancing control of dc link capacitor voltages for five level hybrid diode clamped inverters with passive front ends |
| topic | Capacitor voltage balancing control carrier-overlapped PWM level-shifted PWM model predictive control medium voltage application multilevel inverter |
| url | https://ieeexplore.ieee.org/document/10918991/ |
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