Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits
In this paper, we present the symmetric BSIM-SOI compact model, specifically designed for Dynamically Depleted Silicon-on-Insulator (DDSOI) MOSFETs, with an emphasis on optimizing their performance in RF Transmit/Receive (T/R) switch applications. This surface potential-based model provides a compre...
Saved in:
| Main Authors: | Debashish Nandi, Chetan Kumar Dabhi, Dinesh Rajasekharan, Naveen Karumuri, Sreenidhi Turuvekere, Balaji Swaminathan, Srikanth Srihari, Anupam Dutta, Chenming Hu, Yogesh Singh Chauhan |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10726570/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Multi-Task Learning for Real-Time BSIM-CMG Parameter Extraction of NSFETs With Multiple Structural Variations
by: Seunghwan Lee, et al.
Published: (2024-01-01) -
A Comprehensive Study of Threshold Voltage Extraction Techniques From Room to Cryogenic Temperatures
by: Wajid Manzoor, et al.
Published: (2025-01-01) -
An Investigation in the I-gate Body Contact for Partially Depleted SOI MOSFET
by: Arash Daghighi, et al.
Published: (2024-02-01) -
Design Device for Subthreshold Slope in DG Fully Depleted SOI MOSFET
by: Neha Goel, et al.
Published: (2017-02-01) -
Analysis and Simulation of Low-Frequency Noise in Indium-Zinc-Oxide Thin-Film Transistors
by: Yuan Liu, et al.
Published: (2018-01-01)