Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits
In this paper, we present the symmetric BSIM-SOI compact model, specifically designed for Dynamically Depleted Silicon-on-Insulator (DDSOI) MOSFETs, with an emphasis on optimizing their performance in RF Transmit/Receive (T/R) switch applications. This surface potential-based model provides a compre...
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IEEE
2025-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
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| Online Access: | https://ieeexplore.ieee.org/document/10726570/ |
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| author | Debashish Nandi Chetan Kumar Dabhi Dinesh Rajasekharan Naveen Karumuri Sreenidhi Turuvekere Balaji Swaminathan Srikanth Srihari Anupam Dutta Chenming Hu Yogesh Singh Chauhan |
| author_facet | Debashish Nandi Chetan Kumar Dabhi Dinesh Rajasekharan Naveen Karumuri Sreenidhi Turuvekere Balaji Swaminathan Srikanth Srihari Anupam Dutta Chenming Hu Yogesh Singh Chauhan |
| author_sort | Debashish Nandi |
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| description | In this paper, we present the symmetric BSIM-SOI compact model, specifically designed for Dynamically Depleted Silicon-on-Insulator (DDSOI) MOSFETs, with an emphasis on optimizing their performance in RF Transmit/Receive (T/R) switch applications. This surface potential-based model provides a comprehensive characterization of the device’s behavior, covering both Partial Depletion (PD), Full Depletion (FD), and a smooth transition between PD-FD operational regimes, i.e., Dynamic Depletion (DD), while maintaining source-drain symmetry around <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm { ds}} = 0$ </tex-math></inline-formula>, thereby ensuring an accurate description of higher-order harmonics. The model has been rigorously analyzed and validated incorporating AC, DC, and RF characteristics with correlation to measured hardware data. Additionally, a description of the parasitic capacitances and resistances significant in determining the RF T/R switch performance is provided. Experimental validation was carried out using an advanced Single-Pole Single-Throw (SPST) RF T/R switch from GlobalFoundries Inc., with a thorough evaluation of key parameters such as on-resistance, off-capacitance, insertion loss, and isolation, including their frequency and temperature dependencies. Furthermore, a 65-stage ring oscillator performance was validated through the symmetric BSIMSOI model, demonstrating its effectiveness in logic applications as well. |
| format | Article |
| id | doaj-art-e9f5fbd02c2c440e85402c142d51265f |
| institution | Kabale University |
| issn | 2168-6734 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj-art-e9f5fbd02c2c440e85402c142d51265f2025-08-20T03:58:06ZengIEEEIEEE Journal of the Electron Devices Society2168-67342025-01-011380080710.1109/JEDS.2024.348429510726570Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic CircuitsDebashish Nandi0https://orcid.org/0000-0003-2973-3948Chetan Kumar Dabhi1https://orcid.org/0000-0003-0795-4598Dinesh Rajasekharan2https://orcid.org/0000-0002-1039-7959Naveen Karumuri3https://orcid.org/0000-0002-9439-5079Sreenidhi Turuvekere4https://orcid.org/0000-0002-1935-906XBalaji Swaminathan5Srikanth Srihari6Anupam Dutta7Chenming Hu8https://orcid.org/0000-0003-0836-6296Yogesh Singh Chauhan9https://orcid.org/0000-0002-3356-8917Department of Electrical Engineering, IIT Kanpur, Kanpur, IndiaDepartment of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA, USADepartment of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA, USAGlobalFoundries, Bengaluru, IndiaGlobalFoundries, Bengaluru, IndiaGlobalFoundries, Bengaluru, IndiaGlobalFoundries, Bengaluru, IndiaGlobalFoundries, Bengaluru, IndiaDepartment of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA, USADepartment of Electrical Engineering, IIT Kanpur, Kanpur, IndiaIn this paper, we present the symmetric BSIM-SOI compact model, specifically designed for Dynamically Depleted Silicon-on-Insulator (DDSOI) MOSFETs, with an emphasis on optimizing their performance in RF Transmit/Receive (T/R) switch applications. This surface potential-based model provides a comprehensive characterization of the device’s behavior, covering both Partial Depletion (PD), Full Depletion (FD), and a smooth transition between PD-FD operational regimes, i.e., Dynamic Depletion (DD), while maintaining source-drain symmetry around <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm { ds}} = 0$ </tex-math></inline-formula>, thereby ensuring an accurate description of higher-order harmonics. The model has been rigorously analyzed and validated incorporating AC, DC, and RF characteristics with correlation to measured hardware data. Additionally, a description of the parasitic capacitances and resistances significant in determining the RF T/R switch performance is provided. Experimental validation was carried out using an advanced Single-Pole Single-Throw (SPST) RF T/R switch from GlobalFoundries Inc., with a thorough evaluation of key parameters such as on-resistance, off-capacitance, insertion loss, and isolation, including their frequency and temperature dependencies. Furthermore, a 65-stage ring oscillator performance was validated through the symmetric BSIMSOI model, demonstrating its effectiveness in logic applications as well.https://ieeexplore.ieee.org/document/10726570/AnalogBSIMcompact modelDDSOIRF transmit/receive (T/R) switchlogic |
| spellingShingle | Debashish Nandi Chetan Kumar Dabhi Dinesh Rajasekharan Naveen Karumuri Sreenidhi Turuvekere Balaji Swaminathan Srikanth Srihari Anupam Dutta Chenming Hu Yogesh Singh Chauhan Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits IEEE Journal of the Electron Devices Society Analog BSIM compact model DDSOI RF transmit/receive (T/R) switch logic |
| title | Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits |
| title_full | Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits |
| title_fullStr | Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits |
| title_full_unstemmed | Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits |
| title_short | Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits |
| title_sort | utilizing symmetric bsim soi spice model for dynamically depleted rf soi t r switches and logic circuits |
| topic | Analog BSIM compact model DDSOI RF transmit/receive (T/R) switch logic |
| url | https://ieeexplore.ieee.org/document/10726570/ |
| work_keys_str_mv | AT debashishnandi utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT chetankumardabhi utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT dineshrajasekharan utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT naveenkarumuri utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT sreenidhituruvekere utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT balajiswaminathan utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT srikanthsrihari utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT anupamdutta utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT chenminghu utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits AT yogeshsinghchauhan utilizingsymmetricbsimsoispicemodelfordynamicallydepletedrfsoitrswitchesandlogiccircuits |