A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519
This paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in k...
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| Format: | Article |
| Language: | English |
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IEEE
2025-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/11059939/ |
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| author | Pablo Navarro-Torrero Eros Camacho-Ruiz Macarena C. Martinez-Rodriguez Piedad Brox-Jimenez |
| author_facet | Pablo Navarro-Torrero Eros Camacho-Ruiz Macarena C. Martinez-Rodriguez Piedad Brox-Jimenez |
| author_sort | Pablo Navarro-Torrero |
| collection | DOAJ |
| description | This paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in key generation, signature generation, and signature verification, respectively, compared to the fastest previous hardware implementation in the state-of-the-art. When compared to the software-based OpenSSL implementation, our design demonstrates timing performance improvements ranging from 1000% to 2200%. Additionally, we integrate robust Side-Channel Attack (SCA) countermeasures and validate their effectiveness through Test Vector Leakage Assessment (TVLA). The results demonstrate increased resistance to Simple Power Analysis (SPA) and Differential Power Analysis (DPA), offering a hardware-based secure solution for modern cryptographic applications. |
| format | Article |
| id | doaj-art-e9ca2b08fd364521aac72914e4ccfe8e |
| institution | OA Journals |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-e9ca2b08fd364521aac72914e4ccfe8e2025-08-20T02:36:09ZengIEEEIEEE Access2169-35362025-01-011311574811576510.1109/ACCESS.2025.358469611059939A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519Pablo Navarro-Torrero0https://orcid.org/0009-0006-9360-4322Eros Camacho-Ruiz1https://orcid.org/0000-0002-3177-2260Macarena C. Martinez-Rodriguez2https://orcid.org/0000-0003-3025-5736Piedad Brox-Jimenez3https://orcid.org/0000-0003-1059-5338Instituto de Microelectrónica de Sevilla, IMSE-CNM, CSIC/Universidad de Sevilla, Seville, SpainInstituto de Microelectrónica de Sevilla, IMSE-CNM, CSIC/Universidad de Sevilla, Seville, SpainInstituto de Microelectrónica de Sevilla, IMSE-CNM, CSIC/Universidad de Sevilla, Seville, SpainInstituto de Microelectrónica de Sevilla, IMSE-CNM, CSIC/Universidad de Sevilla, Seville, SpainThis paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in key generation, signature generation, and signature verification, respectively, compared to the fastest previous hardware implementation in the state-of-the-art. When compared to the software-based OpenSSL implementation, our design demonstrates timing performance improvements ranging from 1000% to 2200%. Additionally, we integrate robust Side-Channel Attack (SCA) countermeasures and validate their effectiveness through Test Vector Leakage Assessment (TVLA). The results demonstrate increased resistance to Simple Power Analysis (SPA) and Differential Power Analysis (DPA), offering a hardware-based secure solution for modern cryptographic applications.https://ieeexplore.ieee.org/document/11059939/Elliptic curve cryptographyhigh-performanceEdDSA25519hardware implementationside-channel attacksTVLA |
| spellingShingle | Pablo Navarro-Torrero Eros Camacho-Ruiz Macarena C. Martinez-Rodriguez Piedad Brox-Jimenez A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 IEEE Access Elliptic curve cryptography high-performance EdDSA25519 hardware implementation side-channel attacks TVLA |
| title | A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 |
| title_full | A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 |
| title_fullStr | A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 |
| title_full_unstemmed | A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 |
| title_short | A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519 |
| title_sort | side channel protected and high performance hardware implementation for eddsa25519 |
| topic | Elliptic curve cryptography high-performance EdDSA25519 hardware implementation side-channel attacks TVLA |
| url | https://ieeexplore.ieee.org/document/11059939/ |
| work_keys_str_mv | AT pablonavarrotorrero asidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT eroscamachoruiz asidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT macarenacmartinezrodriguez asidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT piedadbroxjimenez asidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT pablonavarrotorrero sidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT eroscamachoruiz sidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT macarenacmartinezrodriguez sidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 AT piedadbroxjimenez sidechannelprotectedandhighperformancehardwareimplementationforeddsa25519 |