Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling

Objectives. The development of computer technology and information systems requires the consideration of issues of their security, various methods for detecting hardware vulnerabilities of digital device components, as well as protection against unauthorized access. An important aspect of this probl...

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Main Authors: E. F. Pevtsov, T. A. Demenkova, A. О. Indrishenok, V. V. Filimonov
Format: Article
Language:Russian
Published: MIREA - Russian Technological University 2024-08-01
Series:Российский технологический журнал
Subjects:
Online Access:https://www.rtj-mirea.ru/jour/article/view/960
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author E. F. Pevtsov
T. A. Demenkova
A. О. Indrishenok
V. V. Filimonov
author_facet E. F. Pevtsov
T. A. Demenkova
A. О. Indrishenok
V. V. Filimonov
author_sort E. F. Pevtsov
collection DOAJ
description Objectives. The development of computer technology and information systems requires the consideration of issues of their security, various methods for detecting hardware vulnerabilities of digital device components, as well as protection against unauthorized access. An important aspect of this problem is to study existing methods for the possibility and ability to identify hardware errors or search for errors on the corresponding models. The aim of this work is to develop approaches, tools and technology for detecting vulnerabilities in hardware at an early design stage, and to create a methodology for their detection and risk assessment, leading to recommendations for ensuring security at all stages of the computer systems development process.Methods. Methods of semi-natural modeling, comparison and identification of hardware vulnerabilities, and stress testing to identify vulnerabilities were used.Results. Methods are proposed for detecting and protecting against hardware vulnerabilities: a critical aspect in ensuring the security of computer systems. In order to detect vulnerabilities in hardware, methods of port scanning, analysis of communication protocols and device diagnostics are used. The possible locations of hardware vulnerabilities and their variations are identified. The attributes of hardware vulnerabilities and risks are also described. In order to detect vulnerabilities in hardware at an early design stage, a special semi-natural simulation stand was developed. A scanning algorithm using the Remote Bitbang protocol is proposed to enable data to be transferred between OpenOCD and a device connected to the debug port. Based on scanning control, a verification method was developed to compare a behavioral model with a standard. Recommendations for ensuring security at all stages of the computer systems development process are provided.Conclusions. This paper proposes new technical solutions for detecting vulnerabilities in hardware, based on methods such as FPGA system scanning, semi-natural modeling, virtual model verification, communication protocol analysis and device diagnostics. The use of the algorithms and methods thus developed will allow developers to take the necessary measures to eliminate hardware vulnerabilities and prevent possible harmful effects at all stages of the design process of computer devices and information systems.
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institution Kabale University
issn 2782-3210
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spelling doaj-art-e4e7ece7fb5e4611a4b26218bde03ccb2025-08-20T03:39:57ZrusMIREA - Russian Technological UniversityРоссийский технологический журнал2782-32102500-316X2024-08-0112410.32362/2500-316X-2024-12-4-23-39436Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modelingE. F. Pevtsov0T. A. Demenkova1A. О. Indrishenok2V. V. Filimonov3MIREA – Russian Technological UniversityMIREA – Russian Technological UniversityMIREA – Russian Technological UniversityMIREA – Russian Technological UniversityObjectives. The development of computer technology and information systems requires the consideration of issues of their security, various methods for detecting hardware vulnerabilities of digital device components, as well as protection against unauthorized access. An important aspect of this problem is to study existing methods for the possibility and ability to identify hardware errors or search for errors on the corresponding models. The aim of this work is to develop approaches, tools and technology for detecting vulnerabilities in hardware at an early design stage, and to create a methodology for their detection and risk assessment, leading to recommendations for ensuring security at all stages of the computer systems development process.Methods. Methods of semi-natural modeling, comparison and identification of hardware vulnerabilities, and stress testing to identify vulnerabilities were used.Results. Methods are proposed for detecting and protecting against hardware vulnerabilities: a critical aspect in ensuring the security of computer systems. In order to detect vulnerabilities in hardware, methods of port scanning, analysis of communication protocols and device diagnostics are used. The possible locations of hardware vulnerabilities and their variations are identified. The attributes of hardware vulnerabilities and risks are also described. In order to detect vulnerabilities in hardware at an early design stage, a special semi-natural simulation stand was developed. A scanning algorithm using the Remote Bitbang protocol is proposed to enable data to be transferred between OpenOCD and a device connected to the debug port. Based on scanning control, a verification method was developed to compare a behavioral model with a standard. Recommendations for ensuring security at all stages of the computer systems development process are provided.Conclusions. This paper proposes new technical solutions for detecting vulnerabilities in hardware, based on methods such as FPGA system scanning, semi-natural modeling, virtual model verification, communication protocol analysis and device diagnostics. The use of the algorithms and methods thus developed will allow developers to take the necessary measures to eliminate hardware vulnerabilities and prevent possible harmful effects at all stages of the design process of computer devices and information systems.https://www.rtj-mirea.ru/jour/article/view/960hardware vulnerabilitydigital componentshalf-life modelingdiagnosticsscanningverification
spellingShingle E. F. Pevtsov
T. A. Demenkova
A. О. Indrishenok
V. V. Filimonov
Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
Российский технологический журнал
hardware vulnerability
digital components
half-life modeling
diagnostics
scanning
verification
title Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
title_full Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
title_fullStr Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
title_full_unstemmed Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
title_short Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modeling
title_sort identification of digital device hardware vulnerabilities based on scanning systems and semi natural modeling
topic hardware vulnerability
digital components
half-life modeling
diagnostics
scanning
verification
url https://www.rtj-mirea.ru/jour/article/view/960
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AT tademenkova identificationofdigitaldevicehardwarevulnerabilitiesbasedonscanningsystemsandseminaturalmodeling
AT aoindrishenok identificationofdigitaldevicehardwarevulnerabilitiesbasedonscanningsystemsandseminaturalmodeling
AT vvfilimonov identificationofdigitaldevicehardwarevulnerabilitiesbasedonscanningsystemsandseminaturalmodeling