Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs
The popularity of sigma-delta measurement (SDM) in power electronics is increasing due to its high accuracy but is hampered by the significant measurement delay it introduces. This delay is further increased if the SDM's digital filter is designed to attenuate not only the quantization no...
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IEEE
2025-01-01
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| Series: | IEEE Open Journal of the Industrial Electronics Society |
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| Online Access: | https://ieeexplore.ieee.org/document/10908654/ |
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| author | Tomasz Swiechowicz Sebastian Stynski Krzysztof Kulikowski |
| author_facet | Tomasz Swiechowicz Sebastian Stynski Krzysztof Kulikowski |
| author_sort | Tomasz Swiechowicz |
| collection | DOAJ |
| description | The popularity of sigma-delta measurement (SDM) in power electronics is increasing due to its high accuracy but is hampered by the significant measurement delay it introduces. This delay is further increased if the SDM's digital filter is designed to attenuate not only the quantization noise but also the pulsewidth modulation (PWM)-related harmonics. The main objective of this article is to improve the SDM methodology by adding and verifying a new digital filter, named the TSS filter, which reduces measurement delay while remaining robust against the presence of PWM ripple. Given the limited amount of published information on SDM accuracy in PWM voltage-source converters (VSCs), the secondary objective of this article is to experimentally compare it against regular sampled measurement (RSM) on a dedicated platform. To show that the resulting inaccuracies are inherent to RSM rather than stemming from poor converter design, an analysis of measurement error sources in PWM VSCs is conducted. |
| format | Article |
| id | doaj-art-e4d1954ce6464bad92a38505154e9496 |
| institution | DOAJ |
| issn | 2644-1284 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Open Journal of the Industrial Electronics Society |
| spelling | doaj-art-e4d1954ce6464bad92a38505154e94962025-08-20T02:55:53ZengIEEEIEEE Open Journal of the Industrial Electronics Society2644-12842025-01-01634535710.1109/OJIES.2025.354682010908654Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCsTomasz Swiechowicz0https://orcid.org/0000-0003-0975-9104Sebastian Stynski1https://orcid.org/0000-0002-3786-6700Krzysztof Kulikowski2https://orcid.org/0000-0002-6193-7660Institute of Control and Industrial Electronics, Warsaw University of Technology, Warsaw, PolandInstitute of Control and Industrial Electronics, Warsaw University of Technology, Warsaw, PolandDepartment of Electrotechnics, Power Electronics and Electrical Power Engineering, Białystok University of Technology, Białystok, PolandThe popularity of sigma-delta measurement (SDM) in power electronics is increasing due to its high accuracy but is hampered by the significant measurement delay it introduces. This delay is further increased if the SDM's digital filter is designed to attenuate not only the quantization noise but also the pulsewidth modulation (PWM)-related harmonics. The main objective of this article is to improve the SDM methodology by adding and verifying a new digital filter, named the TSS filter, which reduces measurement delay while remaining robust against the presence of PWM ripple. Given the limited amount of published information on SDM accuracy in PWM voltage-source converters (VSCs), the secondary objective of this article is to experimentally compare it against regular sampled measurement (RSM) on a dedicated platform. To show that the resulting inaccuracies are inherent to RSM rather than stemming from poor converter design, an analysis of measurement error sources in PWM VSCs is conducted.https://ieeexplore.ieee.org/document/10908654/Current measurementinverterharmonicspulsewidth modulation (PWM)samplingsigma-delta modulation (SDM) |
| spellingShingle | Tomasz Swiechowicz Sebastian Stynski Krzysztof Kulikowski Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs IEEE Open Journal of the Industrial Electronics Society Current measurement inverter harmonics pulsewidth modulation (PWM) sampling sigma-delta modulation (SDM) |
| title | Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs |
| title_full | Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs |
| title_fullStr | Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs |
| title_full_unstemmed | Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs |
| title_short | Reduced-Delay Sigma-Delta Filter for Accurate Current Measurement in PWM VSCs |
| title_sort | reduced delay sigma delta filter for accurate current measurement in pwm vscs |
| topic | Current measurement inverter harmonics pulsewidth modulation (PWM) sampling sigma-delta modulation (SDM) |
| url | https://ieeexplore.ieee.org/document/10908654/ |
| work_keys_str_mv | AT tomaszswiechowicz reduceddelaysigmadeltafilterforaccuratecurrentmeasurementinpwmvscs AT sebastianstynski reduceddelaysigmadeltafilterforaccuratecurrentmeasurementinpwmvscs AT krzysztofkulikowski reduceddelaysigmadeltafilterforaccuratecurrentmeasurementinpwmvscs |