Low Power Adder Based Auditory Filter Architecture
Cochlea devices are powered up with the help of batteries and they should possess long working life to avoid replacing of devices at regular interval of years. Hence the devices with low power consumptions are required. In cochlea devices there are numerous filters, each responsible for frequency va...
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| Format: | Article |
| Language: | English |
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Wiley
2014-01-01
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| Series: | The Scientific World Journal |
| Online Access: | http://dx.doi.org/10.1155/2014/709149 |
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| author | P. F. Khaleelur Rahiman V. S. Jayanthi |
| author_facet | P. F. Khaleelur Rahiman V. S. Jayanthi |
| author_sort | P. F. Khaleelur Rahiman |
| collection | DOAJ |
| description | Cochlea devices are powered up with the help of batteries and they should possess long working life to avoid replacing of devices at regular interval of years. Hence the devices with low power consumptions are required. In cochlea devices there are numerous filters, each responsible for frequency variant signals, which helps in identifying speech signals of different audible range. In this paper, multiplierless lookup table (LUT) based auditory filter is implemented. Power aware adder architectures are utilized to add the output samples of the LUT, available at every clock cycle. The design is developed and modeled using Verilog HDL, simulated using Mentor Graphics Model-Sim Simulator, and synthesized using Synopsys Design Compiler tool. The design was mapped to TSMC 65 nm technological node. The standard ASIC design methodology has been adapted to carry out the power analysis. The proposed FIR filter architecture has reduced the leakage power by 15% and increased its performance by 2.76%. |
| format | Article |
| id | doaj-art-e48e54a250d04a1e8d16ae91ffd62dcb |
| institution | Kabale University |
| issn | 2356-6140 1537-744X |
| language | English |
| publishDate | 2014-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | The Scientific World Journal |
| spelling | doaj-art-e48e54a250d04a1e8d16ae91ffd62dcb2025-08-20T03:26:27ZengWileyThe Scientific World Journal2356-61401537-744X2014-01-01201410.1155/2014/709149709149Low Power Adder Based Auditory Filter ArchitectureP. F. Khaleelur Rahiman0V. S. Jayanthi1Department of Electronics and Communication Engineering, Hindusthan College of Engineering and Technology, Tamil Nadu 641032, IndiaDepartment of Electronics and Communication Engineering, Hindusthan College of Engineering and Technology, Tamil Nadu 641032, IndiaCochlea devices are powered up with the help of batteries and they should possess long working life to avoid replacing of devices at regular interval of years. Hence the devices with low power consumptions are required. In cochlea devices there are numerous filters, each responsible for frequency variant signals, which helps in identifying speech signals of different audible range. In this paper, multiplierless lookup table (LUT) based auditory filter is implemented. Power aware adder architectures are utilized to add the output samples of the LUT, available at every clock cycle. The design is developed and modeled using Verilog HDL, simulated using Mentor Graphics Model-Sim Simulator, and synthesized using Synopsys Design Compiler tool. The design was mapped to TSMC 65 nm technological node. The standard ASIC design methodology has been adapted to carry out the power analysis. The proposed FIR filter architecture has reduced the leakage power by 15% and increased its performance by 2.76%.http://dx.doi.org/10.1155/2014/709149 |
| spellingShingle | P. F. Khaleelur Rahiman V. S. Jayanthi Low Power Adder Based Auditory Filter Architecture The Scientific World Journal |
| title | Low Power Adder Based Auditory Filter Architecture |
| title_full | Low Power Adder Based Auditory Filter Architecture |
| title_fullStr | Low Power Adder Based Auditory Filter Architecture |
| title_full_unstemmed | Low Power Adder Based Auditory Filter Architecture |
| title_short | Low Power Adder Based Auditory Filter Architecture |
| title_sort | low power adder based auditory filter architecture |
| url | http://dx.doi.org/10.1155/2014/709149 |
| work_keys_str_mv | AT pfkhaleelurrahiman lowpoweradderbasedauditoryfilterarchitecture AT vsjayanthi lowpoweradderbasedauditoryfilterarchitecture |