Multi-Task Learning for Real-Time BSIM-CMG Parameter Extraction of NSFETs With Multiple Structural Variations
We present a novel multi-task learning (MTL) approach with shared representation for the real-time extraction of Berkeley Short-channel IGFET Model-Common Gate (BSIM-CMG) parameters in nanosheet field-effect transistors (NSFETs) with multiple structural variations. An innovative artificial neural ne...
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| Main Authors: | , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10781410/ |
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| Summary: | We present a novel multi-task learning (MTL) approach with shared representation for the real-time extraction of Berkeley Short-channel IGFET Model-Common Gate (BSIM-CMG) parameters in nanosheet field-effect transistors (NSFETs) with multiple structural variations. An innovative artificial neural network (ANN) architecture, coupled with specialized training strategies, was introduced to extract BSIM-CMG parameters in NSFETs with varying gate lengths (<inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {g}}$ </tex-math></inline-formula>), nanosheet widths (<inline-formula> <tex-math notation="LaTeX">$W_{\mathrm {ns}}$ </tex-math></inline-formula>), and thicknesses (<inline-formula> <tex-math notation="LaTeX">$T_{\mathrm {ns}}$ </tex-math></inline-formula>). To mitigate overfitting due to disparate data sources, such as Monte Carlo simulations for training data and technology computer-aided design (TCAD) simulations or hardware measurements for test data, additive noise was incorporated into the training data. Optimal test accuracy was achieved with maximum noise levels of 10% for <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {d}}$ </tex-math></inline-formula> and 2% for <inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {gg}}$ </tex-math></inline-formula>. The MTL approach, leveraging shared representation, effectively captured relationships among input-output groups, reducing the risk of biased ANN training toward any specific group. The proposed method was evaluated using a 1.4 nm node NSFET and eight additional NSFETs with <inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {g}}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">$T_{\mathrm {ns}}$ </tex-math></inline-formula>, and <inline-formula> <tex-math notation="LaTeX">$W_{\mathrm {ns}}$ </tex-math></inline-formula> variations of 1, 0.5, and 5 nm, respectively, from the baseline values of 12, 5, and 25 nm at the 1.4 nm node. The MTL-based ANN successfully extracted BSIM-CMG parameters for both <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {d}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {gg}}$ </tex-math></inline-formula>, yielding low relative modeling errors of 4.26% for <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {d}}$ </tex-math></inline-formula> and 0.709% for <inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {gg}}$ </tex-math></inline-formula>. Additionally, the method was validated using 3 nm node hardware NSFETs and nanowire FETs with varying <inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {g}}$ </tex-math></inline-formula> and nanowire diameters, demonstrating its versatility across different technology nodes and device architectures. |
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| ISSN: | 2169-3536 |