Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors
Abstract The pursuit of near‐ideal subthreshold swing (SS) ≈ 60 mV dec−1 is a primary driving force to realize the power‐efficient field‐effect transistors (FETs). This challenge is particularly pronounced in 2D material‐based FETs, where the presence of a large interface trap density (Dit) imposes...
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Wiley-VCH
2024-09-01
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| Series: | Advanced Electronic Materials |
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| Online Access: | https://doi.org/10.1002/aelm.202400071 |
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| author | Fida Ali Hyungyu Choi Nasir Ali Yasir Hassan Tien Dat Ngo Faisal Ahmed Won‐Kyu Park Zhipei Sun Won Jong Yoo |
| author_facet | Fida Ali Hyungyu Choi Nasir Ali Yasir Hassan Tien Dat Ngo Faisal Ahmed Won‐Kyu Park Zhipei Sun Won Jong Yoo |
| author_sort | Fida Ali |
| collection | DOAJ |
| description | Abstract The pursuit of near‐ideal subthreshold swing (SS) ≈ 60 mV dec−1 is a primary driving force to realize the power‐efficient field‐effect transistors (FETs). This challenge is particularly pronounced in 2D material‐based FETs, where the presence of a large interface trap density (Dit) imposes limitations on electrostatic control, consequently escalating power consumption. In this study, the gate controllability of 2D FETs is systematically analyzed by fabricating pre‐patterned van der Waals (vdW)‐contacted p‐FETs, varying the WSe2 channel thickness from monolayer to ten‐layer. As a result, the channel thickness is optimized to achieve efficient gate controllability while minimizing Dit. The findings demonstrate negligible hysteresis and excellent subthreshold swing (SSmin) close to the thermal limit (≈60 mV dec−1), with a corresponding Dit of ≈1010 cm−2 eV−1, comparable to Dit values observed in state‐of‐the‐art Si transistors, when utilizing WSe2 channel thicknesses ≥ five‐layer. However, reducing the WSe2 channel thickness below the trilayer, SSmin (≈91 mV dec−1) deviates from the thermal limit, attributed to a comparatively higher Dit (≈1011 cm−2 eV−1), despite the still lower than values reported for surface‐contacted 2D transistors. Furthermore, all devices exhibit consistent p‐type characteristics, featuring a high ION/IOFF ratio, high mobility, and excellent electrical stability confirmed over several months. |
| format | Article |
| id | doaj-art-e27f30706c3f44ae8ba936ba349bf9f6 |
| institution | OA Journals |
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| language | English |
| publishDate | 2024-09-01 |
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| series | Advanced Electronic Materials |
| spelling | doaj-art-e27f30706c3f44ae8ba936ba349bf9f62025-08-20T02:16:55ZengWiley-VCHAdvanced Electronic Materials2199-160X2024-09-01109n/an/a10.1002/aelm.202400071Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect TransistorsFida Ali0Hyungyu Choi1Nasir Ali2Yasir Hassan3Tien Dat Ngo4Faisal Ahmed5Won‐Kyu Park6Zhipei Sun7Won Jong Yoo8Department of Electronics and Nanoengineering Aalto University Espoo FI‐02150 FinlandSKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University 2066, Seobu‐ro, Jangan‐gu Suwon Gyeonggi‐do 16419 Republic of KoreaSKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University 2066, Seobu‐ro, Jangan‐gu Suwon Gyeonggi‐do 16419 Republic of KoreaDepartment of Materials Science and Engineering Chungnam National University Daejeon 34134 Republic of KoreaSKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University 2066, Seobu‐ro, Jangan‐gu Suwon Gyeonggi‐do 16419 Republic of KoreaDepartment of Electronics and Nanoengineering Aalto University Espoo FI‐02150 FinlandSKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University 2066, Seobu‐ro, Jangan‐gu Suwon Gyeonggi‐do 16419 Republic of KoreaDepartment of Electronics and Nanoengineering Aalto University Espoo FI‐02150 FinlandSKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University 2066, Seobu‐ro, Jangan‐gu Suwon Gyeonggi‐do 16419 Republic of KoreaAbstract The pursuit of near‐ideal subthreshold swing (SS) ≈ 60 mV dec−1 is a primary driving force to realize the power‐efficient field‐effect transistors (FETs). This challenge is particularly pronounced in 2D material‐based FETs, where the presence of a large interface trap density (Dit) imposes limitations on electrostatic control, consequently escalating power consumption. In this study, the gate controllability of 2D FETs is systematically analyzed by fabricating pre‐patterned van der Waals (vdW)‐contacted p‐FETs, varying the WSe2 channel thickness from monolayer to ten‐layer. As a result, the channel thickness is optimized to achieve efficient gate controllability while minimizing Dit. The findings demonstrate negligible hysteresis and excellent subthreshold swing (SSmin) close to the thermal limit (≈60 mV dec−1), with a corresponding Dit of ≈1010 cm−2 eV−1, comparable to Dit values observed in state‐of‐the‐art Si transistors, when utilizing WSe2 channel thicknesses ≥ five‐layer. However, reducing the WSe2 channel thickness below the trilayer, SSmin (≈91 mV dec−1) deviates from the thermal limit, attributed to a comparatively higher Dit (≈1011 cm−2 eV−1), despite the still lower than values reported for surface‐contacted 2D transistors. Furthermore, all devices exhibit consistent p‐type characteristics, featuring a high ION/IOFF ratio, high mobility, and excellent electrical stability confirmed over several months.https://doi.org/10.1002/aelm.202400071p‐type FETssubthreshold swingtrap densityvan der Waals contactWSe2 thicknesses |
| spellingShingle | Fida Ali Hyungyu Choi Nasir Ali Yasir Hassan Tien Dat Ngo Faisal Ahmed Won‐Kyu Park Zhipei Sun Won Jong Yoo Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors Advanced Electronic Materials p‐type FETs subthreshold swing trap density van der Waals contact WSe2 thicknesses |
| title | Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors |
| title_full | Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors |
| title_fullStr | Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors |
| title_full_unstemmed | Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors |
| title_short | Achieving Near‐Ideal Subthreshold Swing in P‐Type WSe2 Field‐Effect Transistors |
| title_sort | achieving near ideal subthreshold swing in p type wse2 field effect transistors |
| topic | p‐type FETs subthreshold swing trap density van der Waals contact WSe2 thicknesses |
| url | https://doi.org/10.1002/aelm.202400071 |
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