A Substrate-and-Gate Triggering NMOS Device for High ESD Reliability in Deep Submicrometer Technology
A substrate-and-gate triggering scheme which utilizes dynamic threshold principle is proposed for an ESD NMOS structure. This scheme enhances the device reliability performance in terms of higher second breakdown current and both reduced holding voltage/triggering voltage as well as elimination of g...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2013-01-01
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| Series: | Advances in Materials Science and Engineering |
| Online Access: | http://dx.doi.org/10.1155/2013/905686 |
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