Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots
This paper introduces a novel integration method of localized metallic back-gates into fully-depleted silicon-on-insulator (FDSOI) multi-gate FETs, enabling robust front-to-back electrostatic coupling from room temperature to cryogenic conditions, without the need for substrate implantation. The fab...
Saved in:
| Main Authors: | , , , , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10902357/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1850093116780969984 |
|---|---|
| author | Fabio Bersano Niccolo Martinolli Ilan Bouquet Michele Ghini Eloi Collette Liza Zaper Floris Braakman Martino Poggio Mathieu Luisier Adrian Mihai Ionescu |
| author_facet | Fabio Bersano Niccolo Martinolli Ilan Bouquet Michele Ghini Eloi Collette Liza Zaper Floris Braakman Martino Poggio Mathieu Luisier Adrian Mihai Ionescu |
| author_sort | Fabio Bersano |
| collection | DOAJ |
| description | This paper introduces a novel integration method of localized metallic back-gates into fully-depleted silicon-on-insulator (FDSOI) multi-gate FETs, enabling robust front-to-back electrostatic coupling from room temperature to cryogenic conditions, without the need for substrate implantation. The fabrication process, termed the Nanomole process, utilizes nanometric vapor-phase etching of the buried oxide or silicon substrate with vapor-HF and XeF2 gases. This is followed by atomic layer deposition (ALD) of a dielectric material and Pt, with precise patterning achieved through inductively coupled plasma etching. Detailed analysis of the process demonstrates controllable etch rates based on device geometry, providing calibrated guidelines for scalable manufacturing. Symmetric mid-k dual-gating is reported in devices featuring a Si-film thickness of 24 nm, with a top and bottom gate oxide equivalent thickness (EOT) of 6.5 nm. Electrical characterization of multi-gate FDSOI SETs, operated as FETs, confirms effective threshold voltage tuning through dual-gate operation, with consistent performance from room temperature to millikelvin regimes. Additionally, quantum mechanical simulations based on the effective mass approximation at 4 K offer insights into the electrostatic behavior of dual-gated SOI quantum dot devices in both planar and nanowire geometries. This scalable and versatile technological solution opens new possibilities for advanced quantum devices, such as charge and spin qubits, by enabling in situ control over volume inversion, electron valley splitting, and spin-orbit interaction. |
| format | Article |
| id | doaj-art-dfefadd84b1b4f328331a218eda07f45 |
| institution | DOAJ |
| issn | 2168-6734 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj-art-dfefadd84b1b4f328331a218eda07f452025-08-20T02:41:58ZengIEEEIEEE Journal of the Electron Devices Society2168-67342025-01-011321021810.1109/JEDS.2025.354566110902357Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum DotsFabio Bersano0https://orcid.org/0009-0003-8190-6719Niccolo Martinolli1https://orcid.org/0009-0004-2221-3055Ilan Bouquet2Michele Ghini3https://orcid.org/0000-0001-6927-0699Eloi Collette4https://orcid.org/0009-0005-3281-9728Liza Zaper5https://orcid.org/0000-0002-3902-5729Floris Braakman6https://orcid.org/0000-0003-3442-0110Martino Poggio7https://orcid.org/0000-0002-5327-051XMathieu Luisier8https://orcid.org/0000-0002-2212-7972Adrian Mihai Ionescu9https://orcid.org/0000-0003-2314-8887Nanoelectronic Devices Laboratory, IEM EPFL, Lausanne, SwitzerlandNanoelectronic Devices Laboratory, IEM EPFL, Lausanne, SwitzerlandIntegrated Systems Laboratory, ETH Zürich, Zürich, SwitzerlandNanoelectronic Devices Laboratory, IEM EPFL, Lausanne, SwitzerlandNanoelectronic Devices Laboratory, IEM EPFL, Lausanne, SwitzerlandDepartment of Physics, University of Basel, Basel, SwitzerlandDepartment of Physics, University of Basel, Basel, SwitzerlandDepartment of Physics, University of Basel, Basel, SwitzerlandIntegrated Systems Laboratory, ETH Zürich, Zürich, SwitzerlandNanoelectronic Devices Laboratory, IEM EPFL, Lausanne, SwitzerlandThis paper introduces a novel integration method of localized metallic back-gates into fully-depleted silicon-on-insulator (FDSOI) multi-gate FETs, enabling robust front-to-back electrostatic coupling from room temperature to cryogenic conditions, without the need for substrate implantation. The fabrication process, termed the Nanomole process, utilizes nanometric vapor-phase etching of the buried oxide or silicon substrate with vapor-HF and XeF2 gases. This is followed by atomic layer deposition (ALD) of a dielectric material and Pt, with precise patterning achieved through inductively coupled plasma etching. Detailed analysis of the process demonstrates controllable etch rates based on device geometry, providing calibrated guidelines for scalable manufacturing. Symmetric mid-k dual-gating is reported in devices featuring a Si-film thickness of 24 nm, with a top and bottom gate oxide equivalent thickness (EOT) of 6.5 nm. Electrical characterization of multi-gate FDSOI SETs, operated as FETs, confirms effective threshold voltage tuning through dual-gate operation, with consistent performance from room temperature to millikelvin regimes. Additionally, quantum mechanical simulations based on the effective mass approximation at 4 K offer insights into the electrostatic behavior of dual-gated SOI quantum dot devices in both planar and nanowire geometries. This scalable and versatile technological solution opens new possibilities for advanced quantum devices, such as charge and spin qubits, by enabling in situ control over volume inversion, electron valley splitting, and spin-orbit interaction.https://ieeexplore.ieee.org/document/10902357/Cryo-CMOSFDSOIquantum dotsvapor phase etchingback-gatedual-gate control |
| spellingShingle | Fabio Bersano Niccolo Martinolli Ilan Bouquet Michele Ghini Eloi Collette Liza Zaper Floris Braakman Martino Poggio Mathieu Luisier Adrian Mihai Ionescu Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots IEEE Journal of the Electron Devices Society Cryo-CMOS FDSOI quantum dots vapor phase etching back-gate dual-gate control |
| title | Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots |
| title_full | Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots |
| title_fullStr | Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots |
| title_full_unstemmed | Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots |
| title_short | Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots |
| title_sort | nanomole process enabling localized metallic back gates for enhanced cryogenic front to back coupling in fdsoi quantum dots |
| topic | Cryo-CMOS FDSOI quantum dots vapor phase etching back-gate dual-gate control |
| url | https://ieeexplore.ieee.org/document/10902357/ |
| work_keys_str_mv | AT fabiobersano nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT niccolomartinolli nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT ilanbouquet nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT micheleghini nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT eloicollette nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT lizazaper nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT florisbraakman nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT martinopoggio nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT mathieuluisier nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots AT adrianmihaiionescu nanomoleprocessenablinglocalizedmetallicbackgatesforenhancedcryogenicfronttobackcouplinginfdsoiquantumdots |