Folded Silicon-Photonics Arrayed Waveguide Grating Integrated With Loop-Mirror Reflectors
A 1 × 4 loop-mirror-integrated folded silicon-photonics arrayed waveguide grating (AWG) is designed and fabricated on an SOI wafer with two kinds of thickness of silicon areas. The introducing of two silicon thicknesses benefits the design of de/multiplexing devices with an opt...
Saved in:
| Main Authors: | , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2018-01-01
|
| Series: | IEEE Photonics Journal |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/8371263/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | A 1 × 4 loop-mirror-integrated folded silicon-photonics arrayed waveguide grating (AWG) is designed and fabricated on an SOI wafer with two kinds of thickness of silicon areas. The introducing of two silicon thicknesses benefits the design of de/multiplexing devices with an optimal performance and large fabrication tolerances. Transition structures are used to connect 220-nm-thick sections with 340-nm-thick areas. The folded AWG consists of a half normal AWG structure, transition structures array, and loop-mirror reflector array. Each loop-mirror reflector is composed of a 1 × 2 multimode interferometers splitter/combiner and a bend nanowire silicon waveguide, which is designed on a 220-nm-thick silicon region. The half AWG structure with arrayed waveguides is designed on the 340-nm-thick section. The measured on-chip loss and crosstalk are ∼−3.5 and ∼−20 dB, respectively. This integration of devices on an SOI wafer with different thickness of silicon sections is a potential scheme to integrate silicon-based passive and active devices with the best performances of each device. |
|---|---|
| ISSN: | 1943-0655 |